Charging and discharging circuits for assisting charge pumps

    公开(公告)号:US11967896B2

    公开(公告)日:2024-04-23

    申请号:US17935436

    申请日:2022-09-26

    IPC分类号: H02M3/07 H03F3/195 H03F3/24

    摘要: Charging and discharging circuits for assisting charge pumps are disclosed. In certain embodiments, a radio frequency (RF) switch system includes an RF switch that receives an RF signal and is controlled by a switch control signal received at an input, a first charge pump configured to generate a first charge pump voltage, a level shifter powered by the first charge pump voltage and that generates the switch control signal based on a switch enable signal, and a charge pump assistance switch coupled to the input of the radio frequency switch and that activates to assist the first charge pump in response to a transition of the switch enable signal from a first state to a second state.

    WIDE BANDGAP TRANSISTOR LAYOUT WITH STAGGERED GATE ELECTRODE FINGERS

    公开(公告)号:US20240113181A1

    公开(公告)日:2024-04-04

    申请号:US18370125

    申请日:2023-09-19

    摘要: A transistor comprising a first drain region, a first source region disposed on a first side of the first drain region, a first active region defined between the first drain region and the first source region, a second source region disposed on a second side of the first drain region opposite the first side and displaced in a widthwise direction from the first source region, a second active region defined between the first drain region and the second source region, a first gate electrode finger disposed over the first active region, and a second gate electrode finger disposed over the second active region.

    MULTILAYER CAPACITORS WITH INTERDIGITATED FINGERS

    公开(公告)号:US20240079314A1

    公开(公告)日:2024-03-07

    申请号:US18457271

    申请日:2023-08-28

    IPC分类号: H01L23/522 H01G4/30

    CPC分类号: H01L23/5223 H01G4/30

    摘要: A circuit can include a capacitor that has a semiconductor layer, a dielectric layer, and a conductive layer. The circuit can include an insulating layer and a metal or conductive layer. The metal layer can have a first portion that has a first plurality of fingers, and a second portion that has a second plurality of fingers, which can be interdigitated with the first plurality of fingers. The circuit can include one or more first electrical connections that electrically couple the first portion of the metal layer to the semiconductor layer of the capacitor. The circuit can include one or more second electrical connections that electrically couple the second portion of the metal layer to the conductive layer of the capacitor. A capacitance provided by the interdigitated first and second pluralities of fingers can be at least about 3% of a capacitance provided by the capacitor.

    INTEGRATED DEVICE DIE WITH THERMAL CONNECTION

    公开(公告)号:US20230420332A1

    公开(公告)日:2023-12-28

    申请号:US18213200

    申请日:2023-06-22

    IPC分类号: H01L23/367 H01L23/373

    CPC分类号: H01L23/3677 H01L23/373

    摘要: An integrated device die is disclosed. The integrated device die can include a substrate having a first side and a second side opposite the first side, a heat generating electronic component disposed over the first side of the substrate, a dielectric layer disposed such that the heat generating electronic component is positioned at least partially between the substrate and the dielectric layer. A surface of the dielectric layer that faces away from the substrate includes a terminal that is electrically connected to the heat generating electronic component and is laterally offset from the heat generating electronic component. The thermally conductive structure is positioned between the substrate and the terminal. The substrate and the thermally conductive structure at least partially define a thermal pathway between the heat generating electronic component and the terminal.