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公开(公告)号：US10705294B2
公开(公告)日：2020-07-07
申请号：US16295553
申请日：2019-03-07
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor： Sylvain Guerber , Charles Baudot
Abstract: An optical waveguide termination device includes a waveguide and metal vias surrounding an end portion of the waveguide. The end portion of the waveguide has a transverse cross-sectional area that decreases towards its distal end. The metal vias are orthogonal to a same plane, with the same plane being orthogonal to the transverse cross-section. The metal vias absorb light originating from the end portion when a light signal propagates through the waveguide, and the metal vias and the end portion provide that an effective index of an optical mode to be propagated through the waveguide progressively varies in the end portion. Additional metal vias may be present along the waveguide upstream of the end portion, with the additional metal vias bordering the waveguide upstream of the end portion providing that the effective index of an optical mode to be propagated through the waveguide varies progressively toward the end portion.
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公开(公告)号：US10451802B2
公开(公告)日：2019-10-22
申请号：US16374214
申请日：2019-04-03
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor： Charles Baudot
Abstract: A photonic integrated device includes a first waveguide and a second waveguide. The first and second waveguides are mutually coupled at a junction region which includes a bulge region. The bulge region is defined two successive etching operations using two distinct etch masks, where the first etching operation is a partial etch and the second etching operation is a complete etch.
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公开(公告)号：US10073219B2
公开(公告)日：2018-09-11
申请号：US15051904
申请日：2016-02-24
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor： Charles Baudot
IPC: G02B6/12 , H01L21/763 , G02B6/122 , G02F1/025
CPC classification number: G02B6/122 , G02B6/12004 , G02B2006/12097 , G02B2006/121 , G02F1/025
Abstract: An integrated circuit includes an active device for confinement of a light flux that is formed in a semiconducting substrate. A confinement rib is separated from two doped zones by two trenches. Each doped zone includes a contacting zone on an upper face. Each trench widens from a bottom wall towards the upper face of the corresponding doped zone. The widening trenches present a sidewall having a tiered profile between the trench and the doped zone. An opposite sidewall presents a straight profile.
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公开(公告)号：US10042115B2
公开(公告)日：2018-08-07
申请号：US15132408
申请日：2016-04-19
Applicant: STMICROELECTRONICS (CROLLES 2) SAS
Inventor： Frédéric Boeuf , Charles Baudot
IPC: G02B6/12 , H01L23/48 , H01L23/00 , H01L21/768
Abstract: An electro-optic device may include a substrate layer, and a first photonic layer over the substrate layer and having a first photonic device. The electro-optic device may include a second photonic layer over the first photonic layer and having a second photonic device. The electro-optic device may include a dielectric layer over the second photonic layer, and a first electrically conductive via extending through the dielectric layer and the second photonic layer to couple to the first photonic device, and a second electrically conductive via extending through the dielectric layer and coupling to the second photonic device. The electro-optic device may include a third electrically conductive via extending through the substrate layer, the second photonic layer, and the first photonic layer to couple to the substrate layer.
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公开(公告)号：US20180136496A1
公开(公告)日：2018-05-17
申请号：US15868642
申请日：2018-01-11
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor： Charles Baudot , Maurin Douix , Frederic Boeuf , Sébastien Cremer
CPC classification number: G02F1/025 , G02F2001/0151
Abstract: An E/O phase modulator may include a waveguide having an insulating substrate, a single-crystal silicon strip and a polysilicon strip of a same thickness and doped with opposite conductivity types above the insulating substrate, and an insulating interface layer between the single-crystal silicon strip and polysilicon strip. Each of the single-crystal silicon strip and polysilicon strip may be laterally continued by a respective extension, and a respective electrical contact coupled to each extension.
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Patent Agency Ranking
公开(公告)号：US09891450B2
公开(公告)日：2018-02-13
申请号：US15084645
申请日：2016-03-30
Applicant: STMICROELECTRONICS (CROLLES 2) SAS
Inventor： Charles Baudot , Maurin Douix , Frédéric Boeuf , Sébastien Cremer
CPC classification number: G02F1/025 , G02F2001/0151
Abstract: An E/O phase modulator may include a waveguide having an insulating substrate, a single-crystal silicon strip and a polysilicon strip of a same thickness and doped with opposite conductivity types above the insulating substrate, and an insulating interface layer between the single-crystal silicon strip and polysilicon strip. Each of the single-crystal silicon strip and polysilicon strip may be laterally continued by a respective extension, and a respective electrical contact coupled to each extension.
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公开(公告)号：US09269570B2
公开(公告)日：2016-02-23
申请号：US13860845
申请日：2013-04-11
Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES , STMICROELECTRONICS (CROLLES 2) SAS
Inventor： Yves Morand , Charles Baudot , Fabrice Nemouchi
IPC: H01L21/02 , H01L21/285
CPC classification number: H01L21/02381 , H01L21/28518
Abstract: A method is provided for producing a microelectronic device with plural zones made of a metal and semiconductor compound, from semiconductor zones made of different semiconductor materials, and on which a thin semiconductor layer is formed prior to the deposition of a metal layer so as to lower the nucleation barrier of the semiconductor zones when reacting with the metal layer.
Abstract translation: 提供了一种从由不同半导体材料制成的半导体区域制造具有由金属和半导体化合物制成的多个区域的微电子器件的方法，并且在沉积金属层之前在其上形成薄的半导体层以便降低 当与金属层反应时，半导体区的成核势垒。
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公开(公告)号：US11474317B2
公开(公告)日：2022-10-18
申请号：US16748696
申请日：2020-01-21
Applicant: STMICROELECTRONICS (CROLLES 2) SAS
Inventor： Jean-Francois Carpentier , Charles Baudot
Abstract: A photonic system includes a first photonic circuit having a first face and a second photonic circuit having a second face. The first photonic circuit comprises first wave guides, and, for each first wave guide, a second wave guide covering the first wave guide, the second wave guides being in contact with the first face and placed between the first face and the second face, the first wave guides being located on the side of the first face opposite the second wave guides. The second photonic circuit comprises, for each second wave guide, a third wave guide covering the second wave guide. The first photonic circuit comprises first positioning devices projecting from the first face and the second photonic circuit comprises second positioning devices projecting from the second face, at least one of the first positioning devices abutting one of the second positioning devices in a first direction.
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公开(公告)号：US20220252912A1
公开(公告)日：2022-08-11
申请号：US17661356
申请日：2022-04-29
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor： Charles Baudot
Abstract: In one embodiment, an electro-optical modulator includes a waveguide having a first major surface and a second major surface opposite the first major surface. A cavity is disposed in the waveguide. Multiple quantum wells are disposed in the cavity.
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公开(公告)号：US11169325B2
公开(公告)日：2021-11-09
申请号：US16295929
申请日：2019-03-07
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor： Sylvain Guerber , Charles Baudot
Abstract: An optical waveguide is configured to propagate a light signal. Metal vias are arranged along and on either side of a portion of the optical waveguide. Additional metal vias are further arranged along and on either side of the optical waveguide both upstream and downstream of the portion of the optical waveguide. The metal vias and additional metal vias are oriented orthogonal to a same plane, the same plane being orthogonal to a transverse cross-section of the portion of the optical waveguide.
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