公开(公告)号：US20160307537A1

公开(公告)日：2016-10-20

申请号：US15042029

申请日：2016-02-11

Applicant: Samsung Display Co., Ltd

Inventor： Jun Hyun PARK ,  Sung Hwan KIM ,  Se Young SONG ,  Kyoung Ju SHIN ,  Jae Keun LIM

IPC: G09G3/36 ,  H03K17/687

CPC classification number: G09G3/3677 ,  G09G3/20 ,  G09G2300/0465 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0289 ,  G11C19/28 ,  H03K17/6871

Abstract: There is provided a stage circuit capable of minimizing a mounting area. The stage circuit includes: an output unit configured to supply a voltage of a first node, an i-th (i is a natural number) carry signal, and to supply an i-th scan signal in response to the voltage of the first node, a voltage of a second node, and a first clock signal, a controller configured to control the voltage of the second node in response to the first clock signal; a pull-up unit configured to control the voltage of the first node in response to a carry signal of a previous stage and a voltage of a first node of the previous stage, and a pull-down unit configured to control the voltage of the first node in response to the voltage of the second node and a carry signal of a next stage.

Abstract translation: 提供能够最小化安装面积的平台电路。 舞台电路包括：输出单元，被配置为提供第一节点的电压，第i（i是自然数）进位信号，并且响应于第一节点的电压提供第i个扫描信号 ，第二节点的电压和第一时钟信号，被配置为响应于第一时钟信号来控制第二节点的电压的控制器; 上拉单元，被配置为响应于前一级的进位信号和前一级的第一节点的电压来控制第一节点的电压;以及下拉单元，被配置为控制第一节点的电压 响应于第二节点的电压和下一级的进位信号。

公开(公告)号：US20160300860A1

公开(公告)日：2016-10-13

申请号：US14881923

申请日：2015-10-13

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun PARK ,  Do-Hyun KIM

IPC: H01L27/12 ,  C09D183/04 ,  G02F1/1335 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: H01L27/1225 ,  B32B2457/202 ,  C08G77/16 ,  G02F1/133345 ,  G02F2001/136263 ,  G02F2001/136295 ,  H01L27/1244 ,  H01L27/1248 ,  H01L2021/775 ,  Y10T428/10

Abstract: A thin film transistor array panel, including: a first insulating substrate; a gate line disposed on the first insulating substrate and including a gate electrode; a semiconductor layer disposed on the gate electrode; a data conductor layer disposed on the semiconductor layer, and including a data line crossing the gate line, a source electrode connected to the data line and exposing at least a part of the semiconductor layer, and a drain electrode facing the source electrode; a capping layer disposed on the data conductor layer, the semiconductor layer exposed between the source electrode and the drain electrode, and the entire surface of the first insulating substrate; and a first passivation layer disposed on the capping layer. The capping layer and the semiconductor layer include the same material.

Abstract translation: 一种薄膜晶体管阵列面板，包括：第一绝缘基板; 栅极线，设置在所述第一绝缘基板上并且包括栅电极; 设置在所述栅电极上的半导体层; 数据导体层，其设置在所述半导体层上，并且包括与所述栅极线交叉的数据线，与所述数据线连接并暴露所述半导体层的至少一部分的源电极以及面对所述源电极的漏极; 设置在数据导体层上的覆盖层，暴露在源电极和漏电极之间的半导体层以及第一绝缘基板的整个表面; 以及设置在所述封盖层上的第一钝化层。 覆盖层和半导体层包括相同的材料。

公开(公告)号：US20240386850A1

公开(公告)日：2024-11-21

申请号：US18785980

申请日：2024-07-26

Applicant: Samsung Display Co., LTD.

Inventor： Jang Mi KANG ,  Jun Hyun PARK ,  Min Jae JEONG

IPC: G09G3/3233 ,  H10K59/121 ,  H10K59/126 ,  H10K59/131

Abstract: A pixel of display device includes a light emitting element, a first transistor coupled between first power source and a second node and having a gate electrode connected to a first node N1, and the first transistor being configured to control a driving current supplied to the light emitting element in response to a voltage of the first node, a first capacitor including one electrode connected to the first node and another electrode connected to a third node, a second transistor coupled between the third node and a data line, a third transistor coupled between the first node and the second node, a fourth transistor coupled between the first node and an initialization power source, a fifth transistor coupled between a reference power source and the third node, and an eighth transistor coupled between a fourth node and an anode initialization power source.

公开(公告)号：US20240381723A1

公开(公告)日：2024-11-14

申请号：US18780398

申请日：2024-07-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun PARK ,  Jang Mi KANG ,  Hyun Joon KIM ,  Hae Min KIM ,  Min Jae JEONG

IPC: H10K59/131 ,  G09G3/3233 ,  H10K50/813 ,  H10K59/122 ,  H10K59/35

Abstract: A light emitting diode display device includes: a pixel circuit; a data line connected to the pixel circuit to transmit a data voltage; an anode on the pixel circuit and the data line; an emission layer on the anode; and a cathode on the emission layer. The anode includes a first anode and a second anode, and the data line extends across the first anode and the second anode.

公开(公告)号：US20240013711A1

公开(公告)日：2024-01-11

申请号：US18372466

申请日：2023-09-25

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun PARK ,  Jang Mi KANG ,  Min Jae JEONG

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2320/0257 ,  G09G2310/0267 ,  G09G2310/061 ,  G09G2300/0842

Abstract: A pixel may include: a light emitting element; a first transistor connected between a first node electrically connected to a first driving power source and a second node electrically connected to an anode electrode of the light emitting element, the first transistor to control a driving current; a second transistor connected between a data line and the first node; a third transistor connected between the second node and a third node connected to a gate of the first transistor; a fourth transistor connected between the third node and a first initialization power source; a fifth transistor connected between a second initialization power source and the anode electrode of the light emitting element, the fifth transistor being turned on by a scan signal provided to a scan line; and a boosting capacitor connected between the scan line and the third node.

公开(公告)号：US20230178006A1

公开(公告)日：2023-06-08

申请号：US18103356

申请日：2023-01-30

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun PARK ,  Jang Mi KANG ,  Min Jae JEONG

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2320/0257 ,  G09G2310/0267 ,  G09G2310/061 ,  G09G2300/0842

Abstract: A pixel includes: a light emitting element; a first transistor connected between a first node electrically connected to a first driving power source and a second node electrically connected to an anode electrode of the light emitting element, the first transistor to control a driving current; a second transistor connected between a data line and the first node; a third transistor connected between the second node and a third node connected to a gate of the first transistor; a fourth transistor connected between the third node and a first initialization power source; a fifth transistor connected between a second initialization power source and the anode electrode of the light emitting element, the fifth transistor being turned on by a scan signal provided to a scan line; and a boosting capacitor connected between the scan line and the third node.

公开(公告)号：US20230065100A1

公开(公告)日：2023-03-02

申请号：US17982919

申请日：2022-11-08

Applicant: Samsung Display Co., LTD.

Inventor： Jun Hyun PARK ,  Dong Woo KIM ,  An Su LEE ,  Kang Moon JO

IPC: G09G3/32

Abstract: A display device includes a substrate including a display area and a non-display area around the display area; a transistor on the substrate; an insulating layer on the transistor; a power voltage line on the insulating layer and transferring a power voltage; a data line on the insulating layer and transferring a data voltage; and an auxiliary wire between the substrate and the power voltage line in the display area. The auxiliary wire includes a portion overlapping the power voltage line and a portion overlapping the data line in a plan view and is electrically connected to the power voltage line.

公开(公告)号：US20220165839A1

公开(公告)日：2022-05-26

申请号：US17548785

申请日：2021-12-13

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kang Moon JO ,  Dong Woo KIM ,  Sung Jae MOON ,  Jun Hyun PARK ,  An Su LEE

IPC: H01L27/32 ,  H01L51/52

Abstract: A display device including: a substrate; an active layer disposed on the substrate and including active patterns; a first conductive layer disposed on the active layer; a second conductive layer disposed on the first conductive layer and including a data line; a third conductive layer disposed on the second conductive layer; and a light-emitting element disposed on the third conductive layer, wherein the first conductive layer includes a scan line, a first voltage line, and a second voltage line, the third conductive layer includes a third voltage line connected to the first voltage line and a fourth voltage line connected to the second voltage line, the first voltage line and the second voltage line extend in a first direction, the third voltage line and the fourth voltage line extend in a second direction, and the third voltage line and the fourth voltage line are alternately arranged in the first direction.

公开(公告)号：US20220028333A1

公开(公告)日：2022-01-27

申请号：US17190587

申请日：2021-03-03

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Min Jae JEONG ,  Jun Hyun PARK ,  Hyun Joon KIM ,  Kyung Hoon CHUNG ,  Jang Mi KANG ,  Hae Min KIM

IPC: G09G3/3233 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel including: a light emitting element; a first transistor connected between a first power source and a second node; a first capacitor connected to a first node or a second node and a third node; a second transistor between the third node and a data line, the second transistor turned on by a first scan signal; a third transistor between the first and second nodes, the third transistor turned on by a second scan signal; a fifth transistor between the first power source and the first transistor, the fifth transistor turned on by a first emission control signal; a sixth transistor between the second node and the light emitting element, the sixth transistor turned on by a second emission control signal; and an eighth transistor between the second node and a second emission control line, the eighth transistor turned on by a fourth scan signal.

公开(公告)号：US20210248962A1

公开(公告)日：2021-08-12

申请号：US17240551

申请日：2021-04-26

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun PARK ,  Dong Woo KIM ,  Sung Jae MOON ,  An Su LEE ,  Kang Moon JO

IPC: G09G3/3266 ,  G09G3/3275 ,  G09G3/3233

Abstract: A scan driver includes stages for outputting scan signals. An nth stage includes: a first driving controller for controlling a voltage of a first node and a voltage of a second node in response to a previous carry signal; a second driving controller for controlling a voltage of a first driving node, based on a sensing-on signal, a next carry signal, the voltage of a first power source, the voltage of the first node, and a voltage of a sampling node, and controlling a voltage of a second driving node, based on the voltage of the sampling node and a sensing clock signal; an output buffer for outputting a carry signal and the scan signal; and a connection controller for electrically coupling the first node and the first driving node and electrically coupling the second node and the second driving node, in response to a display-on signal.