公开(公告)号：US10673008B2

公开(公告)日：2020-06-02

申请号：US16459060

申请日：2019-07-01

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jaybum Kim ,  Eoksu Kim ,  Kyoungseok Son ,  Junhyung Lim ,  Jihun Lim

IPC: H01L51/52 ,  H01L51/00 ,  H01L27/11 ,  G09G3/32 ,  G09G3/3233 ,  H01L27/32

Abstract: A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.

公开(公告)号：US10593739B2

公开(公告)日：2020-03-17

申请号：US16133404

申请日：2018-09-17

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoungseok Son ,  Myounghwa Kim ,  Eoksu Kim ,  Taesang Kim ,  Masataka Kano

IPC: H01L51/00 ,  H01L27/32 ,  H01L51/56 ,  H01L51/52 ,  H01L27/12 ,  H01L51/50

Abstract: A method of fabricating a display panel may include forming an oxide semiconductor pattern on a base layer including a first region and a second region, etching first, second, and third insulating layers to form a first groove that overlaps the second region, forming electrodes on the third insulating layer, forming a fourth insulating layer on the third insulating layer to cover the electrodes, thermally treating the fourth insulating layer, forming an organic layer to cover the fourth insulating layer, and forming an organic light emitting diode on the organic layer.

公开(公告)号：US10360865B2

公开(公告)日：2019-07-23

申请号：US15463012

申请日：2017-03-20

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jonghee Kim ,  Kyoungseok Son ,  Kyoungju Shin

IPC: G09G3/36

Abstract: A gate driving circuit includes a plurality of stages to provide gate signals to gate lines of a display panel. At least one of the stages includes an input circuit receiving a carry signal from a previous stage. A first output circuit outputs a first clock signal as a gate signal. The second output circuit outputs the clock signal as a carry signal. The discharge hold circuit delivers the clock signal to a node based on the clock signal and discharges the node as a second voltage based on the carry signal. The pull down circuit discharges the gate signal as a first voltage based on a signal of the node and a succeeding carry signal from a succeeding stage and discharges another node and the carry signal as the second voltage. The switching circuit delivers the carry signal from the previous stage based on a second clock signal.

公开(公告)号：US20180366586A1

公开(公告)日：2018-12-20

申请号：US15871468

申请日：2018-01-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kyoungseok Son ,  Eoksu Kim ,  Jaybum Kim ,  Junhyung Lim ,  Jihun Lim

IPC: H01L29/786 ,  H01L27/12 ,  H01L27/32 ,  H01L23/485

Abstract: A display apparatus includes: a substrate on which a first area, a second area spaced apart from the first area, and a bending area between a first area and a second area and bent along a bending axis are defined; a first thin-film transistor (“TFT”) and a second TFT; and a first conductive layer and a second conductive layer. The first TFT includes: a first active layer including polycrystalline silicon; a first gate electrode; and a first electrode disposed at a level which is the same as a level of the first conductive layer, and the second TFT includes: a second active layer including an oxide semiconductor; a second gate electrode; and a second electrode disposed at a level which is the same as a level of the second conductive layer.