公开(公告)号：US08962415B2

公开(公告)日：2015-02-24

申请号：US14264622

申请日：2014-04-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Won Lee ,  Bo-Un Yoon ,  Seung-Jae Lee

IPC: H01L21/8238 ,  H01L21/28 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66

CPC classification number: H01L21/28008 ,  H01L21/28105 ,  H01L21/823842 ,  H01L29/42376 ,  H01L29/49 ,  H01L29/513 ,  H01L29/66545

Abstract: Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.

Abstract translation: 提供了形成半导体器件的栅极的方法。 所述方法可以包括在具有第一导电类型的第一衬底区域中形成第一凹槽，并在具有第二导电类型的第二衬底区域中形成第二凹部。 所述方法还可以包括在第一和第二凹部中形成高k层。 所述方法还可以包括在第一和第二衬底区域中的高k层上提供第一金属，第一金属设置在第二凹槽内。 所述方法还可以包括从第二凹部移除第一金属的至少一部分，同时保护第一凹槽内的材料不被去除。 所述方法还可以包括在从第二凹部去除第一金属的至少一部分之后，在第二凹部内提供第二金属。