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    Non-volatile memory system and host configured to communicate with the same
    4.
    发明授权
    Non-volatile memory system and host configured to communicate with the same 有权
    非易失性存储器系统和主机配置为与之通信

    公开(公告)号：US09430374B2

    公开(公告)日：2016-08-30

    申请号：US14068831

    申请日：2013-10-31

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jong-Won Lee ,  Woo-Young Yang ,  Han-Deok Lee

    IPC: G06F12/00 ,  G06F12/02 ,  G06F3/06 ,  G06F12/10

    CPC classification number: G06F12/0246 ,  G06F3/0611 ,  G06F3/0638 ,  G06F3/0679 ,  G06F12/10 ,  G06F2212/7201

    Abstract: A nonvolatile memory system includes a memory controller for copying a mapping data group including logical-physical address mapping information regarding user data from a nonvolatile memory to a mapping information storage unit, and transmit size information regarding the mapping data group to a host. The host may receive size information regarding the mapping data group from the nonvolatile memory system, and determine the order of commands to be transmitted to the nonvolatile memory based on the size information regarding the mapping data group.

    Abstract translation: 非易失性存储器系统包括存储器控制器，用于将包括关于用户数据的逻辑 - 物理地址映射信息从非易失性存储器复制到映射信息存储单元的映射数据组，并将关于映射数据组的大小信息发送到主机。 主机可以从非易失性存储器系统接收关于映射数据组的大小信息，并且基于关于映射数据组的大小信息来确定要发送到非易失性存储器的命令的顺序。

    Semiconductor package having heat slug and passive device
    5.
    发明授权
    Semiconductor package having heat slug and passive device 有权
    具有散热片和无源器件的半导体封装

    公开(公告)号：US09257418B2

    公开(公告)日：2016-02-09

    申请号：US14095998

    申请日：2013-12-03

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong-Won Lee

    IPC: H01L21/02 ,  H01L25/16 ,  H01L23/367 ,  H01L23/498 ,  H01L23/552 ,  H01L23/00

    CPC classification number: H01L25/16 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/552 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/16251 ,  H01L2924/167 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/014

    Abstract: Provided is a semiconductor package including a substrate, a semiconductor chip and a passive device disposed on the substrate, and a heat slug configured to cover the semiconductor chip and the passive device. The substrate and a first electrode of the passive device are electrically connected to each other, and the heat slug and a second electrode of the passive device are electrically connected to each other. The semiconductor package may include multiple passive devices in which a vertical height of each passive device is greater than a horizontal width thereof. Also disclosed is an electronic system, which may include a power supply unit, a microprocessor unit, a function unit, and a display controller unit to receive one or more power supply voltages from the power supply unit. At least one of the microprocessor unit, the function unit, or the display controller unit may further include the described semiconductor package.

    Abstract translation: 提供了一种半导体封装，其包括衬底，半导体芯片和设置在衬底上的无源器件，以及构造成覆盖半导体芯片和无源器件的散热块。 无源器件的衬底和第一电极彼此电连接，并且无源器件的散热片和第二电极彼此电连接。 半导体封装可以包括多个无源器件，其中每个无源器件的垂直高度大于其水平宽度。 还公开了一种电子系统，其可以包括从电源单元接收一个或多个电源电压的电源单元，微处理器单元，功能单元和显示控制器单元。 微处理器单元，功能单元或显示控制器单元中的至少一个还可以包括所描述的半导体封装。

    Method of compiling a program
    7.
    发明授权
    Method of compiling a program 有权

    公开(公告)号：US10372430B2

    公开(公告)日：2019-08-06

    申请号：US15867168

    申请日：2018-01-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hye-Yeon Chung ,  Han-Jun Kim ,  Jong-Won Lee ,  Chang-Su Kim ,  Seon-Yeong Heo ,  Jun-Mo Park ,  Jong-Hee Yoon

    IPC: G06F9/44 ,  G06F8/41 ,  G06N20/00

    Abstract: In a method of compiling an updated program having a plurality of updated functions that is updated from an original program having a plurality of original functions, it is determined whether a first original function corresponding to a first updated function exists, it is determined whether the first updated function is changed from the first original function, a first optimization combination for the first updated function is searched when the first original function does not exist or when the first updated function is changed from the first original function, a second optimization combination applied to the first original function is read from a configuration database storing optimization combinations for the original functions when the first original function exists and the first updated function is not changed from the first original function, and the updated program is compiled using the first optimization combination or the second optimization combination.

    Methods of forming gates of semiconductor devices
    8.
    发明授权
    Methods of forming gates of semiconductor devices 有权
    形成半导体器件栅极的方法

    公开(公告)号：US08962415B2

    公开(公告)日：2015-02-24

    申请号：US14264622

    申请日：2014-04-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jong-Won Lee ,  Bo-Un Yoon ,  Seung-Jae Lee

    IPC: H01L21/8238 ,  H01L21/28 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51 ,  H01L29/66

    CPC classification number: H01L21/28008 ,  H01L21/28105 ,  H01L21/823842 ,  H01L29/42376 ,  H01L29/49 ,  H01L29/513 ,  H01L29/66545

    Abstract: Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.

    Abstract translation: 提供了形成半导体器件的栅极的方法。 所述方法可以包括在具有第一导电类型的第一衬底区域中形成第一凹槽，并在具有第二导电类型的第二衬底区域中形成第二凹部。 所述方法还可以包括在第一和第二凹部中形成高k层。 所述方法还可以包括在第一和第二衬底区域中的高k层上提供第一金属，第一金属设置在第二凹槽内。 所述方法还可以包括从第二凹部移除第一金属的至少一部分，同时保护第一凹槽内的材料不被去除。 所述方法还可以包括在从第二凹部去除第一金属的至少一部分之后，在第二凹部内提供第二金属。

    METHOD OF COMPILING A PROGRAM
    10.
    发明申请
    METHOD OF COMPILING A PROGRAM 审中-公开

    公开(公告)号：US20180373510A1

    公开(公告)日：2018-12-27

    申请号：US15867168

    申请日：2018-01-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： HYE-YEON CHUNG ,  Han-Jun Kim ,  Jong-Won Lee ,  Chang-su Kim ,  Seon-Yeong Heo ,  Jun-Mo Park ,  Jong-Hee Yoon

    IPC: G06F8/41 ,  G06N99/00

    CPC classification number: G06F8/443 ,  G06F8/4434 ,  G06F8/4441 ,  G06F8/48 ,  G06N20/00

    Abstract: In a method of compiling an updated program having a plurality of updated functions that is updated from an original program having a plurality of original functions, it is determined whether a first original function corresponding to a first updated function exists, it is determined whether the first updated function is changed from the first original function, a first optimization combination for the first updated function is searched when the first original function does not exist or when the first updated function is changed from the first original function, a second optimization combination applied to the first original function is read from a configuration database storing optimization combinations for the original functions when the first original function exists and the first updated function is not changed from the first original function, and the updated program is compiled using the first optimization combination or the second optimization combination.

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