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公开(公告)号：US20120129287A1
公开(公告)日：2012-05-24
申请号：US13360838
申请日：2012-01-30
申请人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
发明人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
IPC分类号： H01L33/08
CPC分类号： H01L51/5206 , H01L27/3244 , H01L27/3246 , H01L27/3281 , H01L27/3295 , H01L51/5215 , Y10S428/917
摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide, concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，硅或氧化硅，其连接到TFT的一侧的导电层的浓度范围为1原子％至6原子％，并且在含有机化合物的层的侧面上的硅或氧化硅浓度范围 从7原子％至15原子％。
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公开(公告)号：US08129900B2
公开(公告)日：2012-03-06
申请号：US12239248
申请日：2008-09-26
申请人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
发明人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
CPC分类号： H01L51/5206 , H01L27/3244 , H01L27/3246 , H01L27/3281 , H01L27/3295 , H01L51/5215 , Y10S428/917
摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，在与TFT连接的一侧上的导电层的硅或氧化硅浓度范围为1原子％至6原子％，并且在含有机化合物的层侧的硅或氧化硅浓度范围为 7原子％至15原子％。
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公开(公告)号：US07247882B2
公开(公告)日：2007-07-24
申请号：US11034767
申请日：2005-01-14
申请人： Shunpei Yamazaki , Jun Koyama , Setsuo Nakajima , Naoya Sakamoto
发明人： Shunpei Yamazaki , Jun Koyama , Setsuo Nakajima , Naoya Sakamoto
IPC分类号： H01L29/04 , H01L29/15 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号： H01L27/124 , G02F1/13454 , G09G3/3208 , G09G3/3648 , G09G2300/0408 , G09G2300/043 , G09G2300/08 , G09G2310/0248 , G09G2310/0267 , G09G2310/0275 , G09G2320/029 , G09G2320/043 , H01L27/1214 , H01L29/78648 , H04N9/3102 , H04N9/3105 , H04N9/312 , H04N9/3173
摘要： There is provided a semiconductor device having TFTs whose thresholds can be controlled.There is provided a semiconductor device including a plurality of TFTs having a back gate electrode, a first gate insulation film, a semiconductor active layer a second gate insulation film and a gate electrode, which are formed on a substrate, wherein an arbitrary voltage is applied to the back gate electrode.
摘要翻译： 提供了具有可以控制阈值的TFT的半导体器件。 提供了一种半导体器件，其包括形成在基板上的多个具有背栅电极，第一栅极绝缘膜，半导体有源层，第二栅极绝缘膜和栅电极的TFT，其中施加任意电压 到背栅电极。
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公开(公告)号：US20050093432A1
公开(公告)日：2005-05-05
申请号：US10937904
申请日：2004-09-10
申请人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
发明人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
CPC分类号： H01L51/5206 , H01L27/3244 , H01L27/3246 , H01L27/3281 , H01L27/3295 , H01L51/5215 , Y10S428/917
摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，在与TFT连接的一侧上的导电层的硅或氧化硅浓度范围为1原子％至6原子％，并且在含有机化合物的层侧的硅或氧化硅浓度范围为 7原子％至15原子％。
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公开(公告)号：US06462723B1
公开(公告)日：2002-10-08
申请号：US09330024
申请日：1999-06-11
申请人： Shunpei Yamazaki , Jun Koyama , Setsuo Nakajima , Naoya Sakamoto
发明人： Shunpei Yamazaki , Jun Koyama , Setsuo Nakajima , Naoya Sakamoto
IPC分类号： G09G332
CPC分类号： H01L27/124 , G02F1/13454 , G09G3/3208 , G09G3/3648 , G09G2300/0408 , G09G2300/043 , G09G2300/08 , G09G2310/0248 , G09G2310/0267 , G09G2310/0275 , G09G2320/029 , G09G2320/043 , H01L27/1214 , H01L29/78648 , H04N9/3102 , H04N9/3105 , H04N9/312 , H04N9/3173
摘要： There is provided a semiconductor device having TFTs whose thresholds can be controlled. There is provided a semiconductor device including a plurality of TFTs having a back gate electrode, a first gate insulation film, a semiconductor active layer a second gate insulation film and a gate electrode, which are formed on a substrate, wherein an arbitrary voltage is applied to the back gate electrode.
摘要翻译： 提供了一种具有能够控制其阈值的TFT的半导体器件。提供了一种半导体器件，其包括具有背栅极电极，第一栅极绝缘膜，半导体有源层，第二栅极绝缘膜和栅极电极的多个TFT ，其形成在基板上，其中任意电压施加到背栅电极。
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公开(公告)号：US08970106B2
公开(公告)日：2015-03-03
申请号：US13360838
申请日：2012-01-30
申请人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
发明人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
CPC分类号： H01L51/5206 , H01L27/3244 , H01L27/3246 , H01L27/3281 , H01L27/3295 , H01L51/5215 , Y10S428/917
摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
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公开(公告)号：US07492090B2
公开(公告)日：2009-02-17
申请号：US10937904
申请日：2004-09-10
申请人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
发明人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
CPC分类号： H01L51/5206 , H01L27/3244 , H01L27/3246 , H01L27/3281 , H01L27/3295 , H01L51/5215 , Y10S428/917
摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，在与TFT连接的一侧上的导电层的硅或氧化硅浓度范围为1原子％至6原子％，并且在含有机化合物的层侧的硅或氧化硅浓度范围为 7原子％至15原子％。
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公开(公告)号：US20090042326A1
公开(公告)日：2009-02-12
申请号：US12239248
申请日：2008-09-26
申请人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
发明人： Shunpei Yamazaki , Toru Takayama , Naoya Sakamoto , Kengo Akimoto , Keiji Sato , Tetsunori Maruyama
IPC分类号： H01L33/00
CPC分类号： H01L51/5206 , H01L27/3244 , H01L27/3246 , H01L27/3281 , H01L27/3295 , H01L51/5215 , Y10S428/917
摘要： According to one aspect of the present invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide is applied as an electrode on the side of injecting a hole (a hole injection electrode; an anode) instead of the conventional conductive transparent oxide layer such as ITO. In addition, according to another aspect of the invention, a laminated structure of conductive transparent oxide layers containing silicon or silicon oxide, each of which content is different, is applied as a hole injection electrode. Preferably, silicon or a silicon oxide concentration of the conductive layer on the side where it is connected to a TFT ranges from 1 atomic % to 6 atomic % and a silicon or silicon oxide concentration on the side of a layer containing an organic compound ranges from 7 atomic % to 15 atomic %.
摘要翻译： 根据本发明的一个方面，在注入孔（空穴注入电极，阳极）的一侧，代替传统的导电透明氧化物，涂覆含有硅或氧化硅的导电透明氧化物层的叠层结构作为电极 层如ITO。 此外，根据本发明的另一方面，作为空穴注入电极，施加含有硅或氧化硅的导电性透明氧化物层（其含量不同）的叠层结构。 优选地，在与TFT连接的一侧上的导电层的硅或氧化硅浓度范围为1原子％至6原子％，并且在含有机化合物的层侧的硅或氧化硅浓度范围为 7原子％至15原子％。
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公开(公告)号：US07476577B2
公开(公告)日：2009-01-13
申请号：US11582471
申请日：2006-10-17
申请人： Shunpei Yamazaki , Taketomi Asami , Toru Takayama , Ritsuko Kawasaki , Hiroki Adachi , Naoya Sakamoto , Masahiko Hayakawa , Hiroshi Shibata , Yasuyuki Arai
发明人： Shunpei Yamazaki , Taketomi Asami , Toru Takayama , Ritsuko Kawasaki , Hiroki Adachi , Naoya Sakamoto , Masahiko Hayakawa , Hiroshi Shibata , Yasuyuki Arai
CPC分类号： H01L29/7842 , H01L27/12 , H01L27/1248 , H01L27/1277 , H01L29/66757 , H01L29/66765 , H01L29/78603 , H01L29/78621 , H01L29/78627 , H01L29/78636 , H01L29/78645 , H01L2029/7863
摘要： In a semiconductor device including a laminate of a first insulating layer, a crystalline semiconductor layer, and a second insulating layer, characteristics of the device are improved by determining its structure in view of stress balance. In the semiconductor device including an active layer of the crystalline semiconductor layer having tensile stress on a substrate, tensile stress is given to the first insulating layer formed to be in close contact with a surface of the semiconductor layer at a substrate side, and compressive stress is given to the second insulating layer formed to be in close contact with a surface of the semiconductor layer at a side opposite to the substrate side.
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公开(公告)号：US07132686B2
公开(公告)日：2006-11-07
申请号：US11298378
申请日：2005-12-08
申请人： Shunpei Yamazaki , Taketomi Asami , Toru Takayama , Ritsuko Kawasaki , Hiroki Adachi , Naoya Sakamoto , Masahiko Hayakawa , Hiroshi Shibata , Yasuyuki Arai
发明人： Shunpei Yamazaki , Taketomi Asami , Toru Takayama , Ritsuko Kawasaki , Hiroki Adachi , Naoya Sakamoto , Masahiko Hayakawa , Hiroshi Shibata , Yasuyuki Arai
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号： H01L29/7842 , H01L27/12 , H01L27/1248 , H01L27/1277 , H01L29/66757 , H01L29/66765 , H01L29/78603 , H01L29/78621 , H01L29/78627 , H01L29/78636 , H01L29/78645 , H01L2029/7863
摘要： In a semiconductor device including a laminate of a first insulating layer, a crystalline semiconductor layer, and a second insulating layer, characteristics of the device are improved by determining its structure in view of stress balance. In the semiconductor device including an active layer of the crystalline semiconductor layer having tensile stress on a substrate, tensile stress is given to the first insulating layer formed to be in close contact with a surface of the semiconductor layer at a substrate side, and compressive stress is given to the second insulating layer formed to be in close contact with a surface of the semiconductor layer at a side opposite to the substrate side.
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