公开(公告)号：US20230164830A1

公开(公告)日：2023-05-25

申请号：US17532343

申请日：2021-11-22

Applicant: Silicon Laboratories Inc.

Inventor： Hendricus de Ruijter

IPC: H04W74/08

CPC classification number: H04W74/0808

Abstract: A wireless network device configured to monitor multiple channels for clear channel assessment (CCA) is disclosed. The receiver circuit of the network device comprises at least one CCA block, which is used to indicated whether a particular channel is clear. In certain embodiments, the network device checks each channel sequentially, and if both channels are free, transmits at least one packet. The at least one packet may include a MODE SWITCH packet and a second packet sent using the new PHY mode. The network device may also have multiple CCA blocks. In this scenario, the channels may be checked concurrently, and if both channels are free, the network device transmits at least one packet. Alternatively, the network device monitors multiple channels concurrently and selected one of the channels on which to transmit a preferred PHY mode, thereby avoiding the need for a MODE SWITCH packet.

公开(公告)号：US20220210001A1

公开(公告)日：2022-06-30

申请号：US17138846

申请日：2020-12-30

Applicant: Silicon Laboratories Inc.

Inventor： Antonio Torrini ,  Hendricus de Ruijter ,  Yan Zhou ,  David Trager

IPC: H04L27/26 ,  H04L27/00

Abstract: An apparatus includes a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas. The RF receiver includes a demodulator to provide a switch signal to cause the RF receiver to use an antenna in the plurality of antennas. The RF receiver further includes a carrier frequency offset (CFO) correction circuit that uses an estimation of the carrier frequency offset and an estimation of phase differences to remove the carrier frequency offset.

公开(公告)号：US20220209808A1

公开(公告)日：2022-06-30

申请号：US17138836

申请日：2020-12-30

Applicant: Silicon Laboratories Inc.

Inventor： Antonio Torrini ,  Hendricus de Ruijter ,  Yan Zhou ,  David Trager

IPC: H04B1/16 ,  H04B1/10

Abstract: An apparatus includes a radio-frequency (RF) receiver for receiving an RF signal using a plurality of antennas. The RF receiver includes a demodulator to provide a switch signal to cause the RF receiver to use an antenna in the plurality of antennas. The RF receiver further includes a carrier frequency offset (CFO) correction circuit that estimates and removes a carrier frequency offset.

公开(公告)号：US11044028B2

公开(公告)日：2021-06-22

申请号：US16034316

申请日：2018-07-12

Applicant: Silicon Laboratories Inc.

Inventor： Hendricus de Ruijter

IPC: H04B17/345 ,  H04L29/06 ,  H04B17/318 ,  H03G3/30

Abstract: An apparatus includes a radio-frequency (RF) receiver, which includes an automatic gain-control (AGC) circuit to use a gain signal to set a gain of front-end circuitry of the RF receiver. The RF receiver further includes an interference-detection circuit to use a value of the gain signal to detect an interference signal.

公开(公告)号：US20200021374A1

公开(公告)日：2020-01-16

申请号：US16034316

申请日：2018-07-12

Applicant: Silicon Laboratories Inc.

Inventor： Hendricus de Ruijter

IPC: H04B17/345 ,  H03G3/30 ,  H04B17/318 ,  H04L29/06

Abstract: An apparatus includes a radio-frequency (RF) receiver, which includes an automatic gain-control (AGC) circuit to use a gain signal to set a gain of front-end circuitry of the RF receiver. The RF receiver further includes an interference-detection circuit to use a value of the gain signal to detect an interference signal.

公开(公告)号：US10389482B2

公开(公告)日：2019-08-20

申请号：US15370693

申请日：2016-12-06

Applicant: Silicon Laboratories Inc.

Inventor： Hendricus de Ruijter ,  Ping Xiong ,  Wentao Li

IPC: H04L1/00 ,  H04L7/00 ,  H04L27/22 ,  H04L7/04

Abstract: An apparatus includes a radio frequency (RF) receiver, which includes a differentiator to differentiate a phase signal to generate a differentiated signal. The RF receiver further includes a correlator coupled to receive and correlate the differentiated signal, and a memory to receive and store the differentiated signal. Samples of the differentiated signal are provided to the correlator and to the memory synchronously.

公开(公告)号：US10061740B2

公开(公告)日：2018-08-28

申请号：US14080405

申请日：2013-11-14

Applicant: Silicon Laboratories Inc.

Inventor： Hendricus de Ruijter ,  Wentao Li

IPC: H04B7/02 ,  H04L1/02 ,  G06F13/42 ,  H04L27/22 ,  H04W56/00 ,  H04J3/16

CPC classification number: G06F13/4295 ,  H04J3/1605 ,  H04L27/22 ,  H04W56/00

Abstract: A receiver includes first, second, and third signal processors and a controller. The first signal processor provides a first signal in response to detecting a first attribute of a received signal. The second signal processor provides a second signal in response to detecting a second attribute of the received signal. The third signal processor provides a third signal in response to detecting a third attribute of the received signal and provides packet data. The controller enables the first signal processor in response to a receive enable signal, controls the third signal processor to provide the packet data in response to receiving the first signal and the third signal, and initializes the first signal processor and the third signal processor in response to receiving the first signal and the second signal.

公开(公告)号：US20180159706A1

公开(公告)日：2018-06-07

申请号：US15370674

申请日：2016-12-06

Applicant: Silicon Laboratories Inc.

Inventor： Ping Xiong ,  Hendricus de Ruijter ,  Amey Naik ,  Yan Zhou

IPC: H04L27/22 ,  H04B1/16

Abstract: An apparatus includes a radio frequency (RF) receiver, which includes a digital signal arrival (DSA) detector to detect arrival of a transmitted signal. The DSA detector includes a frequency discriminator to receive a signal derived from a received RF signal to generate a first complex signal. The DSA detector further includes a correlator coupled to receive and process the first complex signal and to generate a second complex signal. The DSA detector in addition includes a Coordinate Rotation Digital Computer (Cordic) circuit to receive and process the second complex signal to generate a phase signal and a magnitude signal.

公开(公告)号：US20180048499A1

公开(公告)日：2018-02-15

申请号：US15237137

申请日：2016-08-15

Applicant: Silicon Laboratories, Inc.

Inventor： Hendricus de Ruijter

IPC: H04L27/00 ,  H04W8/00 ,  H04W74/00

CPC classification number: H04L27/0008 ,  H04L27/0012 ,  H04L27/2017 ,  H04L27/2082 ,  H04W8/005 ,  H04W74/002 ,  H04W84/18

Abstract: A system for automatically detecting the PHY mode based on the incoming preamble is disclosed. The system includes a multimode demodulator, which includes a preamble detector and a demodulator. The preamble detector is used to determine when the preamble has been received and the PHY mode being used by the sending node. An indication of the PHY mode is supplied to the demodulator, which then decides the incoming bit stream in accordance with the detected PHY mode. In some embodiments, one demodulator, capable of decoding the bit stream in accordance with a plurality of PHY modes is employed. In other embodiments, the system includes a plurality of demodulators, where each is dedicated to one PHY mode.

公开(公告)号：US09831836B1

公开(公告)日：2017-11-28

申请号：US15287892

申请日：2016-10-07

Applicant: Silicon Laboratories Inc.

Inventor： Hendricus de Ruijter

IPC: H03F1/52 ,  H03G3/30 ,  H03F3/19 ,  H03F3/21

CPC classification number: H03F1/52 ,  H03F3/19 ,  H03F3/21 ,  H03F2200/411 ,  H03F2200/426 ,  H03F2200/451 ,  H03G3/30 ,  H03G3/3068 ,  H03G3/3089

Abstract: An automatic gain control (AGC) circuit and method are provided herein to control the gain, and the gain step size, of an amplifier circuit based on a duration of a detected overload condition. According to one embodiment, a method of gain control may include comparing a received signal to a threshold value, detecting an overload condition if the received signal exceeds the threshold value, detecting a duration of the overload condition, and controlling the gain, and the gain step size, of the amplifier circuit based on the detected duration of the overload condition.