摘要:
An overmolded pressure sensor package is provided. The pressure sensor die (Pcell) is capped so that the Pcell has enhanced rigidity to withstand stress effects produced by the molding encapsulant. The Pcell cap includes a hole located away from the Pcell diaphragm, so that external gas pressure can be experienced by the Pcell, while at the same time directing moisture away from the diaphragm. Gel does not need to be used, and instead a soft film can be deposited on the Pcell to protect the Pcell diaphragm from excess moisture, if needed. The Pcell cap can take the form of, for example, a dummy silicon wafer or a functional ASIC.
摘要:
Composite roofing boards and methods for installing a composite roofing board are presented herein. In one embodiment, the roofing board comprises at least nine layers: two outer polymeric layers; two adhesive layers disposed between the two outer polymeric layers; two inner polymeric layers disposed between the two adhesive layers; and a substrate layer disposed between the two inner polymeric layers. A polymeric adhesive, such as an acrylate-polymer adhesive, is preformed on an outer surface of the first and/or second outer polymeric layer. A removable release liner, such as a siliconized polyester film, covers the polymeric adhesive.
摘要:
Quad Flat No-Lead (QFN) packages are provided. An embodiment of a QFN package includes a semiconductor chip including an active surface and an inactive surface, a plurality of leads, a plurality of wire bonds configured to couple the plurality of leads to the semiconductor chip, and a mold material including a mounting side and having a perimeter. The active surface is oriented toward the mounting side, the plurality of wire bonds are disposed between the active surface and the mounting side within the mold material, and the plurality of leads are exposed on the mounting side and are at least partially encapsulated within the perimeter of the mold material.
摘要:
Methods and apparatus are provided for decreasing the size of Quad Flat No-Lead (QFN) packages (300, 400) down to chip-scale packages. Such QFN packages include a first semiconductor chip (310, 410), a plurality of recessed leads (306, 406, 408, 411) having mold lock features, and a mold material 340, 440 substantially encasing all sides of the semiconductor chip. An active surface (314, 414) of the semiconductor chip is oriented toward a mounting side (307, 407) of the QFN package, and a plurality of wire bonds 330, 430 disposed between the active surface and the mounting side couple the active side to the leads. The QFN packages may also include a second semiconductor chip (452) coupled to a plurality of leads (408) and to the first semiconductor chip via wire bonds (431, 432) in a manner similar to the first semiconductor chip.