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公开(公告)号:US07667568B2
公开(公告)日:2010-02-23
申请号:US10593674
申请日:2005-03-23
Applicant: Masanori Tanimura , Torayuki Tsukada , Kousaku Tanaka
Inventor: Masanori Tanimura , Torayuki Tsukada , Kousaku Tanaka
IPC: H01C1/012
CPC classification number: H01C17/281 , H01C1/148 , H01C7/003 , H01C17/006 , Y10T29/49099
Abstract: A chip resistor (A1) includes a chip-like resistor element (1), two electrodes (31) spaced from each other on the bottom surface (1a) of the resistor element, and an insulation film (21) between the two electrodes. Each electrode (31) has an overlapping portion (31c) which overlaps the insulation film (21) as viewed in the vertical direction.
Abstract translation: 片状电阻器(A1)包括片状电阻元件(1),在电阻元件的底面上彼此间隔开的两个电极(31)和两个电极之间的绝缘膜(21)。 每个电极(31)具有在垂直方向上观察时与绝缘膜(21)重叠的重叠部分(31c)。
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公开(公告)号:US20090115568A1
公开(公告)日:2009-05-07
申请号:US11991513
申请日:2006-09-04
Applicant: Torayuki Tsukada
Inventor: Torayuki Tsukada
CPC classification number: H01C1/012 , H01C1/142 , H01C7/003 , H01C17/006 , Y10T29/49099 , Y10T29/49101
Abstract: The chip resistor (1) of the present invention includes an insulating substrate (2) in the form of a chip, a pair of terminal electrodes (3, 4) formed on both ends of the insulating substrate (2), a plurality of resistor films (5) formed on an obverse surface of the insulating substrate (2) in parallel with each other between the paired terminal electrodes (3, 4), and a cover coat formed on the obverse surface of the insulating substrate (2) to cover the resistor films (5). In the chip resistor (1), one of the terminal electrodes (3) includes individual upper electrodes (8) each formed on the obverse surface of the insulating substrate (3, 4) to be independently connected to a respective one of the resistor films (5) and a side electrode (9) formed on a side surface of the insulating substrate (2) to be connected to all the individual upper electrodes (8).
Abstract translation: 本发明的芯片电阻器(1)包括芯片形式的绝缘基板(2),形成在绝缘基板(2)两端的一对端子电极(3,4),多个电阻器 在绝缘基板(2)的正面上在成对的端子电极(3,4)之间彼此平行地形成的膜(5)和形成在绝缘基板(2)的正面上的覆盖膜 电阻膜(5)。 在片状电阻器(1)中,端子电极(3)中的一个包括各自形成在绝缘基板(3,4)的正面上的独立的上电极(8),以独立地连接到电阻膜 (5)和形成在绝缘基板(2)的侧表面上以与所有单独的上电极(8)连接的侧电极(9)。
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公开(公告)号:US20090096570A1
公开(公告)日:2009-04-16
申请号:US11991681
申请日:2006-09-04
Applicant: Torayuki Tsukada
Inventor: Torayuki Tsukada
IPC: H01C10/00
CPC classification number: H01C10/005 , H01C10/14
Abstract: A variable chip resistor (1) of the present invention includes a resistor element (2) made of a metal plate which is in the form of a chip and has a predetermined specific resistance. Terminal electrodes (3, 4) for soldering are provided at both ends of the resistor element (2), and at least one adjustment hole (9) is formed in the resistor element (2) at a portion between the terminal electrodes (3, 4). An adjustment rod (10) is inserted into the adjustment hole (9) in close contact with the inner surface of the adjustment hole. The adjustment rod (10) is made of an electroconductive material, and its insertion depth is adjustable in the axial direction of the adjustment hole (9).
Abstract translation: 本发明的可变片式电阻器(1)包括由金属板制成的电阻元件(2),其为芯片形式并具有预定的电阻率。 在电阻元件(2)的两端设置用于焊接的端子电极(3,4),并且在电极元件(2)的端子电极(3)之间的部分形成有至少一个调整孔(9) 4)。 调整杆(10)与调节孔的内表面紧密接触地插入到调节孔(9)中。 调节杆(10)由导电材料制成,其插入深度可在调节孔(9)的轴向调节。
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公开(公告)号:US20080272879A1
公开(公告)日:2008-11-06
申请号:US12002751
申请日:2007-12-18
Applicant: Torayuki Tsukada
Inventor: Torayuki Tsukada
CPC classification number: H01C7/003 , H01C1/144 , H01C17/006 , H01C17/281 , H05K3/3442 , Y10T29/49099
Abstract: A chip resistor includes a resistive element (1), an insulation layer (4) formed in a back surface of the flat surface, and two electrodes (3) spaced from each other via the insulation layer. Each electrode (3) makes contact with the insulation layer (4). Each electrode (3) has a lower surface formed with a solder layer (39).
Abstract translation: 芯片电阻器包括电阻元件(1),形成在平坦表面的后表面中的绝缘层(4)和经由绝缘层彼此间隔开的两个电极(3)。 每个电极(3)与绝缘层(4)接触。 每个电极(3)具有形成有焊料层(39)的下表面。
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公开(公告)号:US20080224818A1
公开(公告)日:2008-09-18
申请号:US10593674
申请日:2005-03-23
Applicant: Masanori Tanimura , Torayuki Tsukada , Kousaku Tanaka
Inventor: Masanori Tanimura , Torayuki Tsukada , Kousaku Tanaka
CPC classification number: H01C17/281 , H01C1/148 , H01C7/003 , H01C17/006 , Y10T29/49099
Abstract: A chip resistor (A1) includes a chip-like resistor element (1), two electrodes (31) spaced from each other on the bottom surface (1a) of the resistor element, and an insulation film (21) between the two electrodes. Each electrode (31) has an overlapping portion (31c) which overlaps the insulation film (21) as viewed in the vertical direction.
Abstract translation: 片状电阻器(A 1)包括片状电阻元件(1),在电阻元件的底表面(1a)上彼此间隔开的两个电极(31)和两个电极之间的绝缘膜(21) 电极。 每个电极(31)具有在垂直方向上观察时与绝缘膜(21)重叠的重叠部分(31c)。
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公开(公告)号:US20080129443A1
公开(公告)日:2008-06-05
申请号:US11883856
申请日:2006-02-28
Applicant: Torayuki Tsukada , Masaki Yoneda
Inventor: Torayuki Tsukada , Masaki Yoneda
CPC classification number: H01C1/148 , H01C1/032 , H01C1/14 , H01C7/003 , H01C17/006 , Y10T29/49099
Abstract: The chip resistor (1) includes an insulating substrate (2) and a main upper electrode (4) formed on a main surface of the insulating substrate (2). On the main surface of the insulating substrate (2) , a resistor film (5) including an end (5a) overlapping the upper surface of main upper electrode (4) is formed. The resistor film (5) is covered by a protective coat (7, 8). An auxiliary upper electrode (6) is formed on the upper surface of the main upper electrode (4). The auxiliary upper electrode (6) includes an inner end (6a) overlapping the upper surface of the end (5a) of the resistor film (5). The protective coat (7, 8) overlaps the inner end (6a) of the auxiliary upper electrode (6).
Abstract translation: 芯片电阻器(1)包括绝缘基板(2)和形成在绝缘基板(2)的主表面上的主上电极(4)。 在绝缘基板(2)的主表面上形成包括与主上电极(4)的上表面重叠的端部(5a)的电阻膜(5)。 电阻膜(5)被保护层(7,8)覆盖。 辅助上电极(6)形成在主上电极(4)的上表面上。 辅助上电极(6)包括与电阻膜(5)的端部(5a)的上表面重叠的内端(6a)。 保护涂层(7,8)与辅助上电极(6)的内端(6a)重叠。
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37.
公开(公告)号:US20050225424A1
公开(公告)日:2005-10-13
申请号:US10518224
申请日:2003-06-12
Applicant: Torayuki Tsukada
Inventor: Torayuki Tsukada
CPC classification number: H01C7/003 , H01C1/142 , H01C17/006 , H01C17/281 , Y10T29/49082
Abstract: A resistor, including a resistive element made of a metal plate, has a low resistance resulting from connection terminal electrodes formed on both ends of the lower surface of the resistive element. The object thereof is to achieve weight reduction by reducing the height and also to achieve lower costs. To attain the above object, the ends of the lower surface of the resistive element are provided with recesses for accommodating the connection terminal electrodes, while at least the intermediate area of the lower surface of the resistive element between the connection terminal electrodes is covered with an insulator. Alternatively, a recess may be formed in the middle of the lower surface of the resistive element for using the ends of the lower surface as a pair of connection terminal electrodes, the recess being internally covered with an insulator.
Abstract translation: 包括由金属板制成的电阻元件的电阻器具有由形成在电阻元件的下表面的两端上的连接端子电极产生的低电阻。 其目的是通过降低高度来实现减轻重量并且还实现更低的成本。 为了实现上述目的,电阻元件的下表面的端部设置有用于容纳连接端子电极的凹部,而至少在连接端子电极之间的电阻元件的下表面的中间区域被覆盖 绝缘子。 或者,可以在电阻元件的下表面的中间形成凹部,以将下表面的端部用作一对连接端子电极,该凹部内部被绝缘体覆盖。
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38.
公开(公告)号:US20050200451A1
公开(公告)日:2005-09-15
申请号:US10517943
申请日:2003-06-12
Applicant: Torayuki Tsukada
Inventor: Torayuki Tsukada
CPC classification number: H01C17/28 , H01C7/06 , H01C17/006
Abstract: A chip resistor includes a resistor element of a rectangular solid made of an alloy composed of high-resistant metal and low-resistant metal, while also including connection terminal electrodes disposed at the ends of the resistor element that are spaced longitudinally of the rectangular solid. The resistance of the chip resistor is expected to be lowered without incurring an increase in the temperature coefficient of resistance and the weight. The above object is attained by forming a plating layer on the resistor element, where the plating layer is made of pure metal having a lower resistance than that of the alloy constituting the resistor element.
Abstract translation: 芯片电阻器包括由耐高温金属和低电阻金属组成的合金构成的矩形固体的电阻元件,还包括设置在电阻元件末端的连接端子电极,其长度方向与矩形固体间隔开。 预计片式电阻器的电阻降低,而不会导致电阻温度系数和重量的增加。 上述目的是通过在电阻器元件上形成镀层来实现的,其中镀层由比构成电阻元件的合金电阻低的纯金属制成。
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