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    Chip resistor and method of making the same
    1.
    发明授权
    Chip resistor and method of making the same 有权
    芯片电阻及其制作方法

    公开(公告)号：US08325006B2

    公开(公告)日：2012-12-04

    申请号：US12639617

    申请日：2009-12-16

    申请人： Masaki Yoneda

    发明人： Masaki Yoneda

    IPC分类号： H01C1/012

    CPC分类号： H01C1/148 ,  H01C1/028 ,  H01C1/032 ,  H01C7/003

    摘要： A chip resistor includes a substrate, a pair of electrode elements, a resistive layer, and a protective layer. The substrate is insulating and includes a first surface, a second surface opposite the first surface and a thickness defined between the first and second surface. The electrode elements are formed on the first and spaced apart. The resistive layer is formed on the first surface and electrically connected to the electrode elements. The protective layer to covers the resistive layer. The first surface faces toward a mounting target, on which the chip resistor is mounted. Each of the electrode elements comprises an electrode layer and a conductive layer formed on the electrode layer. The boundary between the electrode layer and the conductive layer in each of the electrode elements is positioned closer to the substrate than the end surface of the protective layer in the thickness direction of the substrate.

    摘要翻译： 芯片电阻器包括衬底，一对电极元件，电阻层和保护层。 衬底是绝缘的，并且包括第一表面，与第一表面相对的第二表面和限定在第一和第二表面之间的厚度。 电极元件形成在第一和间隔开的位置。 电阻层形成在第一表面上并与电极元件电连接。 保护层覆盖电阻层。 第一表面面向安装目标，其上安装有芯片电阻器。 每个电极元件包括形成在电极层上的电极层和导电层。 每个电极元件中的电极层和导电层之间的边界在基板的厚度方向上比保护层的端面更靠近基板。

    MANUFACTURING METHOD OF ELECTRONIC PART
    2.
    发明申请
    MANUFACTURING METHOD OF ELECTRONIC PART 审中-公开
    电子部件制造方法

    公开(公告)号：US20110274831A1

    公开(公告)日：2011-11-10

    申请号：US13145453

    申请日：2010-02-15

    申请人： Kazuhiro Saegusa ,  Sinya Satou ,  Shogo Aizawa

    发明人： Kazuhiro Saegusa ,  Sinya Satou ,  Shogo Aizawa

    IPC分类号： B05D5/00 ,  B05D3/02 ,  B05D1/36

    CPC分类号： H01C1/148 ,  H01C1/028 ,  H01C1/032 ,  H01C7/102

    摘要： A manufacturing method of an electronic part (varistor 2) whose device 4 is covered by an outer cover material 6, including the steps of: forming a first outer cover film 8 by coating and fixing a first outer cover film liquid material 30 that includes an organic solvent, on the device 4; and forming a second outer cover film 10 by coating and fixing a second outer cover film liquid material 34, on the first outer cover film 8. The first outer cover film includes a silicone resin or a silicone elastomer, and one or more kind (s) of aluminum hydroxide, magnesium hydrate, or calcium hydrate at a weight ratio ranging from 45/55 to 5/95.

    摘要翻译： 一种电子部件（变阻器2）的制造方法，其装置4被外覆盖材料6覆盖，包括以下步骤：通过涂覆和固定第一外覆盖膜液体材料30来形成第一外覆盖膜8，所述第一外覆盖膜液体材料30包括 有机溶剂，在装置4上; 并且通过在第一外覆盖膜8上涂覆和固定第二外覆盖膜液体材料34来形成第二外覆盖膜10.第一外覆盖膜包括硅树脂或硅氧烷弹性体，以及一种或多种 ）氢氧化铝，水合镁或水合钙，重量比为45/55至5/95。

    CHIP RESISTOR AND METHOD OF MAKING THE SAME
    4.
    发明申请
    CHIP RESISTOR AND METHOD OF MAKING THE SAME 有权
    芯片电阻及其制作方法

    公开(公告)号：US20100171584A1

    公开(公告)日：2010-07-08

    申请号：US12639617

    申请日：2009-12-16

    申请人： Masaki YONEDA

    发明人： Masaki YONEDA

    IPC分类号： H01C7/00

    CPC分类号： H01C1/148 ,  H01C1/028 ,  H01C1/032 ,  H01C7/003

    摘要： A chip resistor of the present invention includes a substrate, a pair of electrode elements, a resistive layer, and a protective layer. The substrate is made of an insulating material and includes a first surface, a second surface opposite the first surface and a thickness defined between the first surface and the second surface. The electrode elements are formed on the first surface of the substrate and spaced apart from each other. The resistive layer is formed on the first surface of the substrate and electrically connected to the electrode elements. The protective layer is provided to cover the resistive layer. The first surface of the substrate is a mount side surface to face toward a mounting target, on which the chip resistor is mounted. Each of the electrode elements comprises an electrode layer and a conductive layer. The electrode layer is electrically connected directly to the resistive layer. The conductive layer is formed on the electrode layer. The boundary between the electrode layer and the conductive layer in each of the electrode elements is positioned closer to the substrate than the end surface of the protective layer in the thickness direction of the substrate.

    摘要翻译： 本发明的片式电阻器包括衬底，一对电极元件，电阻层和保护层。 衬底由绝缘材料制成，并且包括第一表面，与第一表面相对的第二表面和限定在第一表面和第二表面之间的厚度。 电极元件形成在基板的第一表面上并彼此间隔开。 电阻层形成在基板的第一表面上并与电极元件电连接。 提供保护层以覆盖电阻层。 衬底的第一表面是安装侧面，面向安装对象，安装有芯片电阻器。 每个电极元件包括电极层和导电层。 电极层直接电连接到电阻层。 导电层形成在电极层上。 每个电极元件中的电极层和导电层之间的边界在基板的厚度方向上比保护层的端面更靠近基板。

    Resistor having moisture resistant layer
    5.
    发明授权
    Resistor having moisture resistant layer 失效
    电阻器具有防潮层

    公开(公告)号：US06201290B1

    公开(公告)日：2001-03-13

    申请号：US09228025

    申请日：1999-01-08

    申请人： Hiroyuki Yamada ,  Mitsunari Nakatani

    发明人： Hiroyuki Yamada ,  Mitsunari Nakatani

    IPC分类号： H01C2702

    CPC分类号： H01C17/006 ,  H01C1/032 ,  H01C7/003

    摘要： A resistor comprising a substrate typically made of aluminum, a pair of top electrode layers made of a thin noble metal film disposed on both ends of the top face of the substrate, and a resistance layer of a thin metal film made of Ni system or Cr system disposed on the top face of the substrate so as to electrically connect with the top electrode layer. The moisture absorbency of a protective layer is reduced to upgrade sealing of the resistance layer by covering the resistance layer with two resin layers: a first protective layer made of polyimide resin and a second protective layer made of epoxy resin, which have different water vapor permeability, to improve the reliability, particularly the moisture resistance characteristics, of the resistor.

    摘要翻译： 一种电阻器，包括通常由铝制成的基板，由设置在基板的顶面的两端的薄的贵金属膜构成的一对顶部电极层以及由Ni系或Cr系制成的金属薄膜的电阻层 系统设置在基板的顶面上，以与顶部电极层电连接。 通过用两层树脂层覆盖电阻层来降低保护层的吸湿性，从而提高电阻层的密封性：由聚酰亚胺树脂制成的第一保护层和由环氧树脂制成的第二保护层，其具有不同的透湿性 ，以提高电阻器的可靠性，特别是防潮特性。

    CHIP COMPONENT AND CHIP COMPONENT PRODUCTION METHOD
    10.
    发明公开
    CHIP COMPONENT AND CHIP COMPONENT PRODUCTION METHOD 审中-公开

    公开(公告)号：US20240153678A1

    公开(公告)日：2024-05-09

    申请号：US17769311

    申请日：2020-09-24

    申请人： KOA CORPORATION

    发明人： Yasushi AKAHANE ,  Nobuhiko TAMADA

    IPC分类号： H01C17/00 ,  C25D3/56 ,  C25D5/12 ,  C25D7/06 ,  C25D21/12 ,  H01C1/032 ,  H01C1/142 ,  H01C17/242

    CPC分类号： H01C17/006 ,  C25D3/562 ,  C25D5/12 ,  C25D7/0642 ,  C25D21/12 ,  H01C1/032 ,  H01C1/142 ,  H01C17/242

    摘要： A chip component 10 comprises: an insulating substrate 1 on which a resistor 3 serving as a functional element is formed; a pair of internal electrodes (front electrodes 2, end surface electrodes 6, and back electrodes 5) that is formed to cover both end portions of the insulating substrate 1 and connected to the resistor 3; a barrier layer 8 that is formed on a surface of each of the internal electrodes and mainly composed of nickel; and an external connection layer 9 that is formed on a surface of the barrier layer 8 and mainly composed of tin, and the barrier layer 8 is composed of alloy plating (Ni—P) including nickel and phosphorus, which is formed by electrolytic plating, and a content rate of phosphorus in the alloy plating of an inner region is made different from that of an outer region so that at least the inner region of the barrier layer 8 has magnetic properties.