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119 条记录 (耗时 0.033 秒)

    Nonvolatile memory controller with logical defective cluster table
    31.
    发明授权
    Nonvolatile memory controller with logical defective cluster table 有权
    具有逻辑故障簇表的非易失性存储器控制器

    公开(公告)号：US08484409B2

    公开(公告)日：2013-07-09

    申请号：US13051270

    申请日：2011-03-18

    申请人： Toshiyuki Honda

    发明人： Toshiyuki Honda

    IPC分类号： G06F12/06

    CPC分类号： G06F12/0246 ,  G06F11/1068 ,  G06F2212/7204

    摘要： A controller includes a control unit for controlling writing and/or reading of data to and from physical block based on a logical address from a host device, a logical defective cluster table for storing information concerning a logical address of a logical defective cluster which is one or more partial areas within the effective logical address range and an address conversion table for storing corresponding information of a logical address of the effective logical address range and a physical address of the physical block on the data stored in the physical block. Upon receiving a data write command from the host device for writing data to the logical address stored in the logical defective cluster table, the control unit disables the reflection of writing of data for the logical address to the physical block.

    摘要翻译： 控制器包括：控制单元，用于基于来自主机设备的逻辑地址来控制向物理块写入和/或读取数据;逻辑缺陷簇表，用于存储关于逻辑缺陷簇的逻辑地址的信息，该逻辑缺陷簇是一个 或更多的部分区域，以及地址转换表，用于存储有效逻辑地址范围的逻辑地址和物理块的物理地址对存储在物理块中的数据的对应信息。 一旦从主机装置接收到将数据写入存储在逻辑缺陷簇表中的逻辑地址的数据写入命令，则控制单元将逻辑地址数据的写入反映到物理块。

    Memory system
    32.
    发明授权
    Memory system 有权
    内存系统

    公开(公告)号：US08375238B2

    公开(公告)日：2013-02-12

    申请号：US12788740

    申请日：2010-05-27

    申请人： Toshiyuki Honda

    发明人： Toshiyuki Honda

    IPC分类号： G06F1/12

    CPC分类号： G06F1/10

    摘要： A memory controller takes in the first to (N−1)th pieces of data respectively in synchronization with the second to Nth return read clocks. The memory controller takes in the Nth piece of data from stop of output of the Nth read clock and before a first predetermined time. The memory controller sets an output period of the Nth read clock to be longer than an output period of each of the first to (N−1)th read clocks.

    摘要翻译： 存储器控制器分别与第二至第N返回读时钟同步地接收第一至第（N-1）个数据。 存储器控制器从第N个读时钟的输出停止并在第一预定时间之前接收第N个数据。 存储器控制器将第N读取时钟的输出周期设置为长于第一至第（N-1）个读时钟中的每一个的输出周期。

    Controller with error correction function, storage device with error correction function, and system with error correction function
    33.
    发明授权
    Controller with error correction function, storage device with error correction function, and system with error correction function 有权
    具有纠错功能的控制器，具有纠错功能的存储装置，以及具有纠错功能的系统

    公开(公告)号：US08356237B2

    公开(公告)日：2013-01-15

    申请号：US12673814

    申请日：2009-07-27

    申请人： Toshiyuki Honda

    发明人： Toshiyuki Honda

    IPC分类号： H03M13/00

    CPC分类号： G06F11/1068 ,  G11C2029/0411

    摘要： The invention is intended to curtail the circuit scale of the error correction circuit of a flash memory. The invention relates to a controller with error correction function capable of controlling writing and reading of data in a plurality of memories, including a buffer memory, an error correction circuit, and a plurality of interface modules provided individually corresponding to each one of the plurality of memories, for exchanging data with the memories, in which the plurality of interface modules have a plurality of syndrome generation function parts for receiving sector data from the memories and error correction codes corresponding to the sector data, and generating syndromes on the basis of the received sector data and error correction codes, the buffer memory temporarily stores the plurality of sector data, and the error correction circuit determines the address having an error corresponding to each one of the syndromes generated by the plurality of syndrome generation function parts, and corrects the bit corresponding to such address in the sector data stored in the buffer memory.

    摘要翻译： 本发明旨在限制闪速存储器的纠错电路的电路规模。 本发明涉及一种具有纠错功能的控制器，其能够控制多个存储器中的数据的写入和读取，所述存储器包括缓冲存储器，纠错电路和多个接口模块，所述多个接口模块分别对应于多个 存储器，用于与存储器交换数据，其中多个接口模块具有多个用于从存储器接收扇区数据的校正子生成功能部件和对应于扇区数据的纠错码，并且基于接收到的校正子 扇区数据和纠错码，缓冲存储器临时存储多个扇区数据，并且纠错电路确定具有与由多个校正子生成函数部分生成的每个校正子相对应的错误的地址，并校正位 对应于存储在缓冲存储器中的扇区数据中的这样的地址 y。

    MEMORY CONTROLLER AND NON-VOLATILE STORAGE DEVICE
    34.
    发明申请
    MEMORY CONTROLLER AND NON-VOLATILE STORAGE DEVICE 有权
    内存控制器和非易失性存储设备

    公开(公告)号：US20120317340A1

    公开(公告)日：2012-12-13

    申请号：US13435493

    申请日：2012-03-30

    申请人： Hirokazu SO ,  Toshiyuki Honda

    发明人： Hirokazu SO ,  Toshiyuki Honda

    IPC分类号： G06F12/02

    CPC分类号： G06F11/1068

    摘要： A non-volatile storage device comprises non-volatile memories for storing data; and a memory controller for carrying out control of the non-volatile memory. The memory controller stores second error correcting code as well as first error correcting code stored in the same page of the data. The memory controller, when writing data smaller than a predefined size, does not add the second error correcting code, and stores duplexed data of the data and the first correcting code in a different page. The memory controller, when reading, corrects data using the first and/or second correcting code. The valid data management table manages which logical block stores valid data with respect to an identical logical address.

    摘要翻译： 非易失性存储设备包括用于存储数据的非易失性存储器; 以及用于执行非易失性存储器的控制的存储器控​​制器。 存储器控制器存储第二纠错码以及存储在同一页数据中的第一纠错码。 当写入小于预定义尺寸的数据时，存储器控制器不添加第二纠错码，并将数据和第一校正码的双工数据存储在不同的页面中。 存储器控制器在读取时使用第一和/或第二校正码校正数据。 有效数据管理表管理哪个逻辑块相对于相同的逻辑地址存储有效数据。

    Electromagnetic wave shielding material and process for producing the same
    36.
    发明授权
    Electromagnetic wave shielding material and process for producing the same 有权
    电磁波屏蔽材料及其制造方法

    公开(公告)号：US08168252B2

    公开(公告)日：2012-05-01

    申请号：US11569544

    申请日：2005-05-19

    申请人： Atsushi Okada ,  Akio Kiyohara ,  Hideki Tanaka ,  Toshiyuki Honda ,  Masafumi Ito ,  Junichi Kato ,  Noboru Toshima ,  Yasuhisa Nakao

    发明人： Atsushi Okada ,  Akio Kiyohara ,  Hideki Tanaka ,  Toshiyuki Honda ,  Masafumi Ito ,  Junichi Kato ,  Noboru Toshima ,  Yasuhisa Nakao

    IPC分类号： H01J11/02

    CPC分类号： C09D5/24 ,  C09D5/32 ,  C09D11/52 ,  H01J2211/446 ,  H05K9/0096 ,  Y10T428/2809

    摘要： The present invention provides an electromagnetic wave shielding material that has high electromagnetic wave shielding effects, excellent transparency, and excellent see-through property, and a simple and inexpensive production process for the electromagnetic wave shielding material. Specifically, the present invention provides a process for producing an electromagnetic wave shielding material, the process comprising screen-printing in a geometric pattern a conductive paste containing a particulate silver oxide, a tertiary fatty acid silver salt, and a solvent, onto a transparent porous layer surface of a transparent resin substrate having a transparent porous layer containing as a main component at least one member selected from the group consisting of oxide ceramics, non-oxide ceramics, and metals; and performing heat treatment to form a conductive region with a geometric pattern on the transparent porous layer surface; and an electromagnetic wave shielding material produced by the production process.

    摘要翻译： 本发明提供一种电磁波屏蔽材料具有高电磁波屏蔽效果，优异的透明性，透明性优异的电磁波屏蔽材料以及电磁波屏蔽材料的简单且廉价的制造方法。 具体地说，本发明提供了一种电磁波屏蔽材料的制造方法，该方法包括以几何图案将含有颗粒状氧化银，叔脂肪酸银盐和溶剂的导电糊剂丝网印刷到透明多孔 具有透明多孔层的透明树脂基板的层表面含有选自氧化物陶瓷，非氧化物陶瓷和金属中的至少一种元素作为主要成分; 并进行热处理以在透明多孔层表面上形成具有几何图案的导电区域; 以及通过该制造方法制造的电磁波屏蔽材料。

    Memory controller, nonvolatile memory device, access device, and nonvolatile memory system
    37.
    发明授权
    Memory controller, nonvolatile memory device, access device, and nonvolatile memory system 有权
    存储控制器，非易失性存储器件，存取器件和非易失性存储器系统

    公开(公告)号：US08112575B2

    公开(公告)日：2012-02-07

    申请号：US12376153

    申请日：2007-08-01

    申请人： Masahiro Nakanishi ,  Takuji Maeda ,  Toshiyuki Honda ,  Tatsuya Adachi

    发明人： Masahiro Nakanishi ,  Takuji Maeda ,  Toshiyuki Honda ,  Tatsuya Adachi

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246 ,  G11C16/20

    摘要： A file to be read or written is designated and accessed from an access device side to a nonvolatile memory device. In an initialization after start-up of the power source, an empty capacity detector detects empty capacity parameters of a nonvolatile memory with dividing the memory into a plurality of regions. An empty capacity parameter notification part notifies the access device of the empty capacity parameters in a stepwise fashion whenever the empty capacity detector detects an empty capacity. With this, at the time when the empty capacity becomes not less than a capacity required to write file data, the data can be written to the nonvolatile memory without waiting for completion of the initialization, resulting in improvement of a response in the recording.

    摘要翻译： 要从读取或写入的文件被指定并从访问设备侧访问到非易失性存储设备。 在电源启动后的初始化中，空容量检测器通过将存储器分成多个区域来检测非易失性存储器的空容量参数。 只要空容量检测器检测到空容量，空容量参数通知部分逐步地通知存取设备空容量参数。 这样，当空容量变得不小于写入文件数据所需的容量时，可以将数据写入非易失性存储器，而不用等待初始化的完成，从而改善了记录中的响应。

    Non-volatile memory device and write method thereof
    38.
    发明授权
    Non-volatile memory device and write method thereof 有权
    非易失性存储器件及其写入方法

    公开(公告)号：US07987314B2

    公开(公告)日：2011-07-26

    申请号：US10569880

    申请日：2004-08-26

    申请人： Toshiyuki Honda

    发明人： Toshiyuki Honda

    IPC分类号： G06F12/00

    CPC分类号： G06F12/0246

    摘要： It is possible to eliminate the defect that a long time is required for writing into a semiconductor memory card by resulting from the fact, with enlargement of its capacity, that the external data management size is different from the internal data management size in the semiconductor memory card. A partial physical block corresponding to the size managed externally is used regardless of the size of the physical block in a non-volatile memory device. Data are written in the partial physical block unit and an erase block is assured in the physical block unit, thereby enabling the write rate to be increased.

    摘要翻译： 由于外部数据管理尺寸与半导体存储器的内部数据管理尺寸不同，因此能够消除由于事实而导致写入半导体存储卡需要长时间的缺陷。 卡。 与非易失性存储器件中的物理块的大小无关地使用与外部管理的大小相对应的部分物理块。 数据被写入部分物理块单元中，并且在物理块单元中确保擦除块，从而能够增加写入速率。

    MEMORY CONTROLLER, MEMORY CARD, AND NONVOLATILE MEMORY SYSTEM
    40.
    发明申请
    MEMORY CONTROLLER, MEMORY CARD, AND NONVOLATILE MEMORY SYSTEM 有权
    内存控制器，内存卡和非易失性存储系统

    公开(公告)号：US20100228905A1

    公开(公告)日：2010-09-09

    申请号：US12373839

    申请日：2008-07-15

    申请人： Toshiyuki Honda

    发明人： Toshiyuki Honda

    IPC分类号： G06F12/10 ,  G06F12/00 ,  G06F12/02

    CPC分类号： G06F12/0246 ,  G06F2212/7201

    摘要： A nonvolatile memory system includes a memory card (102) and host equipment (101). The memory card (102) includes a nonvolatile memory (106) including a plurality of physical blocks, and a memory controller (105) for writing data into the nonvolatile memory (106). The host equipment (101) provides to the memory card (102) an access instruction that designates a logical address and a channel number. The memory controller (105) has an address conversion function for converting the logical address into a physical address in the nonvolatile memory (106), a write destination determination function for determining in relation to the channel number a physical address in the nonvolatile memory (106) to which the data is to be written, and a channel management function for individually managing for each channel number a write state in which data of a smaller size than each physical block is written.

    摘要翻译： 非易失性存储器系统包括存储卡（102）和主机设备（101）。 存储卡（102）包括包括多个物理块的非易失性存储器（106）和用于将数据写入非易失性存储器（106）的存储器控​​制器（105）。 主机设备（101）向存储卡（102）提供指定逻辑地址和通道号的访问指令。 存储器控制器（105）具有用于将逻辑地址转换为非易失性存储器（106）中的物理地址的地址转换功能，用于根据通道号确定非易失性存储器（106）中的物理地址的写入目的地确定功能 ）和用于对每个通道号分别管理写入状态的通道管理功能，其中写入比每个物理块小的数据的写入状态。