公开(公告)号：US20200035680A1

公开(公告)日：2020-01-30

申请号：US16594054

申请日：2019-10-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yen-Wei Tung ,  Jen-Yu Wang ,  Cheng-Tung Huang ,  Yan-Jou Chen

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/762 ,  H01L21/02 ,  H01L29/06 ,  H01L27/02

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first fin-shaped structure on a substrate; forming a first single diffusion break (SDB) structure in the first fin-shaped structure; forming a first gate structure on the first SDB structure and a second gate structure on the first fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; forming a patterned mask on the first gate structure; and performing a replacement metal gate (RMG) process to transform the second gate structure into a metal gate.

公开(公告)号：US09793296B2

公开(公告)日：2017-10-17

申请号：US15296027

申请日：2016-10-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Yin Weng ,  Cheng-Tung Huang ,  Ya-Ru Yang ,  Yi-Ting Wu ,  Yu-Ming Lin ,  Jen-Yu Wang

IPC: H01L27/12 ,  H01L29/10 ,  H01L29/66 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L29/04 ,  H01L21/02 ,  H01L21/308 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/84

CPC classification number: H01L27/1207 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/02639 ,  H01L21/3081 ,  H01L21/76251 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for fabricating substrate of a semiconductor device includes the steps of: providing a first silicon layer; forming a dielectric layer on the first silicon layer; bonding a second silicon layer to the dielectric layer; removing part of the second silicon layer and part of the dielectric layer to define a first region and a second region on the first silicon layer, wherein the remaining of the second silicon layer and the dielectric layer are on the second region; and forming an epitaxial layer on the first region of the first silicon layer, wherein the epitaxial layer and the second silicon layer comprise same crystalline orientation.

公开(公告)号：US09508799B2

公开(公告)日：2016-11-29

申请号：US14469566

申请日：2014-08-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Wen-Yin Weng ,  Cheng-Tung Huang ,  Ya-Ru Yang ,  Yi-Ting Wu ,  Yu-Ming Lin ,  Jen-Yu Wang

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/16 ,  H01L29/165 ,  H01L29/78 ,  H01L29/04 ,  H01L21/02

CPC classification number: H01L27/1207 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02178 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02609 ,  H01L21/02639 ,  H01L21/3081 ,  H01L21/76251 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/1054 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785

Abstract: A method for fabricating substrate of a semiconductor device is disclosed. The method includes the steps of: providing a first silicon layer; forming a dielectric layer on the first silicon layer; bonding a second silicon layer to the dielectric layer; removing part of the second silicon layer and part of the dielectric layer to define a first region and a second region on the first silicon layer, wherein the remaining of the second silicon layer and the dielectric layer are on the second region; and forming an epitaxial layer on the first region of the first silicon layer, wherein the epitaxial layer and the second silicon layer comprise same crystalline orientation.

Abstract translation: 公开了一种用于制造半导体器件的衬底的方法。 该方法包括以下步骤：提供第一硅层; 在所述第一硅层上形成介电层; 将第二硅层接合到介电层; 去除所述第二硅层的一部分和所述介电层的一部分以限定所述第一硅层上的第一区域和第二区域，其中所述第二硅层和所述介电层的剩余部分位于所述第二区域上; 以及在所述第一硅层的所述第一区上形成外延层，其中所述外延层和所述第二硅层包含相同的晶体取向。