公开(公告)号：US20210083002A1

公开(公告)日：2021-03-18

申请号：US16655251

申请日：2019-10-17

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ya-Sheng Feng ,  Yu-Chun Chen ,  Chiu-Jung Chiu

IPC: H01L27/22 ,  G11C11/16 ,  H01L43/02 ,  H01F10/32 ,  H01L43/10

Abstract: A circuit selector of embedded magnetoresistive random access memory (EMRAM) includes a transistor comprising a source/drain terminal coupled to a first magnetic tunneling junction (MTJ) and a second MTJ, a gate terminal, and a drain/source terminal coupled to a voltage source. Preferably, the first MTJ includes a first free layer, a first barrier layer, and a first pinned layer, in which the first free layer is coupled to the source/drain terminal and the first pinned layer is coupled to a first circuit. The second MTJ includes a second free layer, a second barrier layer, and a second pinned layer, in which the second pinned layer is coupled to the source/drain terminal and the second free layer is coupled to a second circuit.

公开(公告)号：US10665772B2

公开(公告)日：2020-05-26

申请号：US16178542

申请日：2018-11-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Chun Chen ,  Ya-Sheng Feng ,  Chiu-Jung Chiu ,  Hung-Chan Lin

IPC: H01L43/02 ,  H01F10/32 ,  H01L23/535 ,  H01L43/12 ,  H01F41/34 ,  H01L27/22 ,  H01L43/10 ,  G11C11/16

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the MTJ, and a second spacer on another side of the MTJ, wherein the first spacer and the second spacer are asymmetric. Specifically, the MTJ further includes a first bottom electrode disposed on a metal interconnection, a capping layer on the bottom electrode, and a top electrode on the capping layer, in which a top surface of the first spacer is even with a top surface of the top electrode and a top surface of the second spacer is lower than the top surface of the top electrode and higher than the top surface of the capping layer.

公开(公告)号：US20200111950A1

公开(公告)日：2020-04-09

申请号：US16178542

申请日：2018-11-01

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Chun Chen ,  Ya-Sheng Feng ,  Chiu-Jung Chiu ,  Hung-Chan Lin

IPC: H01L43/02 ,  H01F10/32 ,  H01L23/535 ,  H01L27/22 ,  H01L43/12 ,  H01F41/34

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the MTJ, and a second spacer on another side of the MTJ, wherein the first spacer and the second spacer are asymmetric. Specifically, the MTJ further includes a first bottom electrode disposed on a metal interconnection, a capping layer on the bottom electrode, and a top electrode on the capping layer, in which a top surface of the first spacer is even with a top surface of the top electrode and a top surface of the second spacer is lower than the top surface of the top electrode and higher than the top surface of the capping layer.