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    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20240387418A1

    公开(公告)日：2024-11-21

    申请号：US18209486

    申请日：2023-06-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Yu-Chun Chen ,  Yu-Ping Wang ,  I-Ming Tseng ,  Yi-An Shih ,  Chung-Sung Chiang ,  Chiu-Jung Chiu

    IPC: H01L23/00 ,  H01L21/768 ,  H01L23/522 ,  H01L25/065

    Abstract: A semiconductor device includes a bottom wafer, a top wafer bonded to the bottom wafer, a first dielectric layer, a second dielectric layer, a deep via conductor structure, and a connection pad. The top wafer includes a first interconnection structure. The first dielectric layer is disposed on the top wafer. The second dielectric layer is disposed on the first dielectric layer. The deep via conductor structure penetrates through the second dielectric layer and the first dielectric layer and is connected with the first interconnection structure. The connection pad is disposed on the second dielectric layer and the deep via conductor structure. A first portion of the second dielectric layer is sandwiched between the connection pad and the first dielectric layer. A second portion of the second dielectric layer is connected with the first portion, and a thickness of the second portion is less than a thickness of the first portion.

    FIN TYPE ELECTROSTATIC DISCHARGE PROTECTION DEVICE
    8.
    发明申请
    FIN TYPE ELECTROSTATIC DISCHARGE PROTECTION DEVICE 有权
    FIN型静电放电保护装置

    公开(公告)号：US20160351558A1

    公开(公告)日：2016-12-01

    申请号：US15144836

    申请日：2016-05-03

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Yu-Chun Chen ,  Ping-Chen Chang ,  Tien-Hao Tang ,  Kuan-Cheng Su

    IPC: H01L27/02 ,  H01L29/08 ,  H01L29/10 ,  H01L29/06 ,  H01L27/088 ,  H01L29/417

    CPC classification number: H01L27/0266 ,  H01L27/0248 ,  H01L27/0886 ,  H01L27/1211 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/7851

    Abstract: A fin type ESD protection device includes at least one first fin, at least one second fin, and at least one gate structure. The first fin is disposed on a semiconductor substrate, and a source contact contacts the first fin. The second fin is disposed on the semiconductor substrate, and a drain contact contacts the second fin. The first fin and the second fin extend in a first direction respectively, and the first fin is separated from the second fin. The gate structure is disposed between the source contact and the drain contact. The first fin is separated from the drain contact, and the second fin is separated from the source contact.

    Abstract translation: 翅片型ESD保护装置包括至少一个第一鳍片，至少一个第二鳍片和至少一个栅极结构。 第一翅片设置在半导体衬底上，源极触点接触第一鳍片。 第二鳍片设置在半导体衬底上，漏极接触件接触第二鳍片。 第一鳍片和第二鳍片分别在第一方向上延伸，并且第一鳍片与第二鳍片分离。 栅极结构设置在源极触点和漏极触点之间。 第一鳍片与漏极接触部分开，第二鳍片与源极接触部分离开。

    Semiconductor structure suitable for electrostatic discharge protection application
    9.
    发明授权
    Semiconductor structure suitable for electrostatic discharge protection application 有权
    半导体结构适用于静电放电保护应用

    公开(公告)号：US09466598B1

    公开(公告)日：2016-10-11

    申请号：US14798564

    申请日：2015-07-14

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Yu-Cheng Liao ,  Yu-Chun Chen ,  Ping-Chen Chang ,  Tien-Hao Tang

    IPC: H01L27/02 ,  H01L29/861

    CPC classification number: H01L27/0255 ,  H01L27/0259 ,  H01L27/0262 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/861 ,  H01L29/87

    Abstract: A semiconductor structure suitable for ESD protection application is provided. The semiconductor structure includes a first well, a second well, a third well, a first fin, a second fin, an anode, a cathode and a first doping region. The first well and the second well are disposed in the third well. The first fin is disposed on the first well. The second fin is disposed on the second well. The anode is disposed on the first fin. The cathode is disposed on the second fin. The first doping region is disposed under the first fin, and separates the first fin from the first well. The first well, the second well, the first fin and the second fin have a first doping type. The third well and the first doping region have a second doping type.

    Abstract translation: 提供了适用于ESD保护应用的半导体结构。 半导体结构包括第一阱，第二阱，第三阱，第一鳍片，第二鳍片，阳极，阴极和第一掺杂区域。 第一口井和第二口井位于第三口井。 第一个翅片放在第一个井上。 第二个翅片设置在第二个孔上。 阳极设置在第一翅片上。 阴极设置在第二散热片上。 第一掺杂区域设置在第一鳍片下方，并且将第一鳍片与第一阱分离。 第一井，第二井，第一鳍和第二鳍具有第一种掺杂类型。 第三阱和第一掺杂区具有第二掺杂类型。

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