公开(公告)号：US20160314351A1

公开(公告)日：2016-10-27

申请号：US14697167

申请日：2015-04-27

申请人： Xerox Corporation

发明人： Adrian Corneliu Mos ,  Adrien Gaidon ,  Eleonora Vig

IPC分类号： G06K9/00 ,  H04N7/18 ,  G06F3/0484 ,  G06K9/62

CPC分类号： G06K9/00711 ,  G06F3/0484 ,  G06K9/00201 ,  G06K9/00288 ,  G06K9/00362 ,  G06K9/00718 ,  G06K9/00785 ,  G06K9/00986 ,  G06K9/3258 ,  G06K9/4652 ,  G06K9/62 ,  G06K2209/15 ,  H04N7/181

摘要： A graphical user interface (GUI) of a business process management (BPM) system is provided to construct a process model that is displayed on a graphical display device as a graphical representation comprising nodes representing process events, activities, or decision points and including computer vision (CV) nodes representing video stream processing, with flow connectors defining operational sequences of nodes and data flow between nodes of the process model. The process model is executed to perform a process represented by the process model including executing CV nodes of the process model by performing video stream processing represented by the CV nodes of the process model. The available CV nodes include a set of video pattern detection nodes, and a set of video pattern relation nodes defining a video grammar of relations between video patterns detectable by the video pattern detection nodes.

摘要翻译： 提供业务流程管理（BPM）系统的图形用户界面（GUI）以构建在图形显示设备上显示的过程模型，其中图形表示包括表示过程事件，活动或决策点的节点，并包括计算机视觉 （CV）节点表示视频流处理，流连接器定义节点的操作序列和过程模型的节点之间的数据流。 执行过程模型以执行由过程模型表示的过程，包括通过执行由过程模型的CV节点表示的视频流处理来执行过程模型的CV节点。 可用的CV节点包括一组视频模式检测节点，以及一组视频模式关系节点，其定义由视频模式检测节点可检测的视频模式之间的关系的视频语法。

公开(公告)号：US20160292566A1

公开(公告)日：2016-10-06

申请号：US15037659

申请日：2014-11-27

申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

发明人： Marc DURANTON ,  Jean-Marc PHILIPPE

IPC分类号： G06N3/063 ,  G06N3/04

CPC分类号： G06N3/063 ,  G06F12/02 ,  G06F12/0223 ,  G06K9/00986 ,  G06N3/04 ,  G11C11/54 ,  Y02D10/13

摘要： A signal processing module comprises at least one operational unit incorporating computation units, input and output interfaces able to be linked to a bus and a memory storing data destined for the computation units, the memory being organized so that each data word is stored column-wise over several addresses according to an order dependent on the application, a column having a width of one bit, the words being transferred in series to the computation units.

摘要翻译： 信号处理模块包括至少一个包含计算单元的操作单元，能够链接到总线的输入和输出接口以及存储目的地用于计算单元的数据的存储器，所述存储器被组织以使得每个数据字被逐列地存储 根据取决于应用的顺序的多个地址，具有一位宽度的列，这些字被串行传送到计算单元。

公开(公告)号：US09449257B2

公开(公告)日：2016-09-20

申请号：US14649859

申请日：2012-12-04

申请人： INSTITUTE OF SEMICONDUCTORS, CHINESE ACADEMY OF SCIENCES

发明人： Cong Shi ,  Nanjian Wu ,  Xitian Long ,  Jie Yang ,  Qi Qin

IPC分类号： G06K9/62 ,  G06F15/80 ,  G06T1/20 ,  G06N3/04 ,  G06N3/063

CPC分类号： G06K9/6251 ,  G06F15/8023 ,  G06K9/00986 ,  G06N3/0454 ,  G06N3/063 ,  G06T1/20

摘要： The present invention proposes a dynamically reconfigurable multi-level parallel single instruction multiple data array processing system which has a pixel level parallel image processing element array and a row-parallel array processor. The PE array mainly implements a linear operation which is adapted to be executed in parallel in the low and middle levels of image processing and the RP array implements an operation which is adapted to execute in row-parallel in the low and middle levels of image processing or more complex nonlinear operations. In particularly, such a system can be dynamically reconfigured as an SOM neural network at a low cost of area, and the neural network supports high level of image processing such as a high speed online neural network training and image feature recognition, and completely overcomes a defect that a high level of image processing can't be done by pixel-level parallel processing array in the existing programmable vision chips and parallel vision processors, and facilitates an intelligent and portable real time on-chip vision image system with a complete function at low device cost and low power consumption.

摘要翻译： 本发明提出一种具有像素级并行图像处理元件阵列和行并行阵列处理器的动态可重构多级并行单指令多数据阵列处理系统。 PE阵列主要实现一种线性操作，适用于在低级和中级图像处理中并行执行，并且RP阵列实现了适用于在低级和中级级别的图像处理中并行执行的操作 或更复杂的非线性运算。 特别地，这样的系统可以以低成本的区域动态地重新配置为SOM神经网络，并且神经网络支持诸如高速在线神经网络训练和图像特征识别的高级图像处理，并且完全克服了 缺点是现有可编程视觉芯片和并行视觉处理器中的像素级并行处理阵列无法进行高水平的图像处理，便于具有完整功能的智能便携式实时片上视觉图像系统 设备成本低，功耗低。

公开(公告)号：US09438795B1

公开(公告)日：2016-09-06

申请号：US14753947

申请日：2015-06-29

申请人： Google Inc.

发明人： Abhijit S. Ogale

IPC分类号： G06K9/46 ,  H04N5/232 ,  H04N5/262 ,  G06T7/00 ,  G06T3/40

CPC分类号： H04N5/23238 ,  G06K9/00523 ,  G06K9/00986 ,  G06T3/4038 ,  G06T7/13 ,  G06T7/174 ,  G06T2207/10004 ,  G06T2207/20164 ,  G06T2207/20221 ,  H04N5/2624

摘要： A computer-implemented method for method for detecting features in an image. The method includes receiving first and second images at one or more processors. The method also includes processing the first and second images to detect one or more features within the first and second images respectively. The method further includes generating a third image based on processed portions of the first and second images and outputting the third image to another processor. A mobile computing device and GPU are also provided.

摘要翻译： 一种用于检测图像中的特征的计算机实现的方法。 该方法包括在一个或多个处理器处接收第一和第二图像。 该方法还包括处理第一和第二图像以分别检测第一和第二图像内的一个或多个特征。 该方法还包括基于第一和第二图像的处理部分生成第三图像，并将第三图像输出到另一个处理器。 还提供了移动计算设备和GPU。

公开(公告)号：US20160247043A1

公开(公告)日：2016-08-25

申请号：US15048786

申请日：2016-02-19

申请人： Warren Rieutort-Louis ,  Tiffany Moy ,  Zhuo Wang ,  Naveen Verma ,  Sigurd Wagner ,  James C. Sturm

发明人： Warren Rieutort-Louis ,  Tiffany Moy ,  Zhuo Wang ,  Naveen Verma ,  Sigurd Wagner ,  James C. Sturm

IPC分类号： G06K9/62 ,  H04N5/225 ,  H04N5/232

CPC分类号： G06K9/6256 ,  G06K9/00986 ,  G06K9/6217 ,  G06N20/00 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/14638 ,  H04N5/23229 ,  H04N5/32

摘要： Large-area electronics (LAE) enables the formation of a large number of sensors capable of spanning dimensions on the order of square meters. An example is X-ray imagers, which have been scaling both in dimension and number of sensors, today reaching millions of pixels. However, processing of the sensor data requires interfacing thousands of signals to CMOS ICs, because the implementation of complex functions in LAE has proven unviable due to the low electrical performance and inherent variability of the active devices available, namely amorphous silicon (a-Si) thin-film transistors (TFTs) on glass. Envisioning applications that perform sensing on even greater scales, disclosed is an approach whereby high-quality image detection is performed directly in the LAE domain using TFTs. The high variability and number of process defects affecting both the TFTs and sensors are overcome using a machine-learning algorithm, known as Error-Adaptive Classifier Boosting (EACB), to form an embedded classifier. Through EACB, the high-dimensional sensor data can be reduced to a small number of weak-classifier decisions, which can then be combined in the CMOS domain to generate a strong-classifier decision.

摘要翻译： 大面积电子（LAE）可以形成大量的传感器，能够跨越平方米的尺寸。 一个例子是X射线成像仪，其尺寸和传感器数量已经缩小，今天达到数百万像素。 然而，传感器数据的处理需要将数千个信号连接到CMOS IC，因为LAE中的复杂功能的实现被证明是不可行的，因为可用的有源器件（即非晶硅（a-Si））具有低的电性能和固有的可变性， 玻璃上的薄膜晶体管（TFT）。 公开了一种使用TFT直接在LAE领域中进行高品质图像检测的方法。 使用称为误差自适应分类器升压（EACB）的机器学习算法来克服影响TFT和传感器两者的高变异性和数量的过程缺陷，以形成嵌入式分类器。 通过EACB，可以将高维度传感器数据减少到少量的弱分类器决策，然后将其组合在CMOS域中以产生强分类器决策。

公开(公告)号：US20160225119A1

公开(公告)日：2016-08-04

申请号：US14629307

申请日：2015-02-23

申请人： QUALCOMM Incorporated

发明人： Qinwen Xu ,  Bo Zhou ,  Shuxue Quan ,  Junchen Du

IPC分类号： G06T1/20 ,  G06T1/60

CPC分类号： G06T1/20 ,  G06K9/00986 ,  G06K9/4642 ,  G06K9/4671 ,  G06T1/60 ,  G06T2200/28 ,  G06T2207/20021

摘要： A method for calculating a feature descriptor on a single instruction, multiple data (SIMD) processor is described. The method includes generating histogram bin indexes in a first register. The method also includes generating weights in a second register. The method further includes updating an entire histogram table in a register file based on the histogram bin indexes and the weights without storing any histogram bin to memory. Histogram bins are updated in parallel with a single instruction.

摘要翻译： 描述了用于计算单个指令，多数据（SIMD）处理器上的特征描述符的方法。 该方法包括在第一寄存器中生成直方图箱索引。 该方法还包括在第二寄存器中产生权重。 该方法还包括基于直方图单元索引和权重来更新寄存器文件中的整个直方图表，而不将任何直方图bin存储到存储器。 直方图箱与单个指令并行更新。

公开(公告)号：US20160210718A1

公开(公告)日：2016-07-21

申请号：US14599272

申请日：2015-01-16

申请人： Oracle International Corporation

发明人： Jean-Baptiste Tristan ,  Guy Steele

IPC分类号： G06T1/20

CPC分类号： G06K9/00 ,  G06F16/93 ,  G06K9/00442 ,  G06K9/00986

摘要： A novel data-parallel algorithm is presented for topic modeling on a highly-parallel hardware architectures. The algorithm is a Markov-Chain Monte Carlo algorithm used to estimate the parameters of the LDA topic model. This algorithm is based on a highly parallel partially-collapsed Gibbs sampler, but replaces a stochastic step that draws from a distribution with an optimization step that computes the mean of the distribution directly and deterministically. This algorithm is correct, it is statistically performant, and it is faster than state-of-the art algorithms because it can exploit the massive amounts of parallelism by processing the algorithm on a highly-parallel architecture, such as a GPU. Furthermore, the partially-collapsed Gibbs sampler converges about as fast as the collapsed Gibbs sampler and identifies solutions that are as good, or even better, as the collapsed Gibbs sampler.

摘要翻译： 提出了一种新颖的数据并行算法，用于高并行硬件架构上的主题建模。 该算法是用于估计LDA主题模型参数的马尔可夫链蒙特卡罗算法。 该算法基于高度并行的部分折叠Gibbs采样器，但是替代了从分布中抽取的随机步骤，其中优化步骤直接和确定地计算分布的平均值。 该算法是正确的，它是统计学上的，它比现有技术的算法更快，因为它可以通过在诸如GPU的高度并行架构上处理算法来利用大量的并行性。 此外，部分折叠的吉布斯采样器收敛的速度与收缩的吉布斯取样器一样快，并识别与折叠的吉布斯取样器一样好甚至更好的解决方案。

公开(公告)号：US09367892B2

公开(公告)日：2016-06-14

申请号：US14579787

申请日：2014-12-22

申请人： Baidu Online Network Technology (Beijing) Co., Ltd.

发明人： Ren Wu ,  Shigang Li ,  Dalong Du ,  Wenzhi Liu

IPC分类号： G06K9/64 ,  G06T1/60 ,  G06K9/00 ,  G06K9/46 ,  G06T5/20

CPC分类号： G06T1/60 ,  G06K9/00986 ,  G06K9/4642 ,  G06T5/20 ,  G06T2207/20021 ,  G06T2207/20024 ,  G06T2207/20084 ,  G06T2207/20182

摘要： A processing method and a processing apparatus for a single-channel convolution layer, and a processing method and apparatus for a multi-channel convolution layer are provided. The processing method for a single-channel convolution layer includes following steps. Data to be processed is divided into a plurality of data blocks, the plurality of data blocks are read by a plurality of graphic processor thread groups into local memories of the plurality of graphic processor thread groups, a plurality of filters are read by the plurality of graphic processor thread groups into the local memories of the plurality of graphic processor thread groups and convolutions of corresponding data points in the plurality of data blocks and the plurality of filters simultaneously are calculated by a plurality of threads in the plurality of graphic processor thread groups.

摘要翻译： 提供了一种用于单通道卷积层的处理方法和处理装置，以及用于多通道卷积层的处理方法和装置。 单通道卷积层的处理方法包括以下步骤。 要处理的数据被分成多个数据块，多个数据块被多个图形处理器线程组读取成多个图形处理器线程组的本地存储器，多个滤波器被多个 通过多个图形处理器线程组中的多个线程来计算图形处理器线程组到多个图形处理器线程组的本地存储器中以及多个数据块和多个滤波器中的相应数据点的卷积。

公开(公告)号：US20160125606A1

公开(公告)日：2016-05-05

申请号：US14926587

申请日：2015-10-29

申请人： James W. Justice ,  Medhat Azzazy ,  Virgillio Villacorta ,  Xuemin Chi

发明人： James W. Justice ,  Medhat Azzazy ,  Virgillio Villacorta ,  Xuemin Chi

IPC分类号： G06T7/00 ,  G06K9/00 ,  G06T1/20

CPC分类号： G06K9/4623 ,  G06K9/00624 ,  G06K9/00986 ,  G06K9/6273

摘要： There has been a significant advance in the capabilities of electro-optical sensors to search wide areas and provide data streams that contain information critical to system operators. The problem being addressed by this invention is the accurate and timely interpretation of the observations made by these sensor suites and the instantiation of the processing on practical low power, high throughput processors which enable deployment on a wide variety of platforms. The interpretation of sensor observations will also depend upon a) the general situation, e.g. level of hostility, and b) collateral data, e.g. normal or abnormal operations of the platforms themselves. Can accurate and timely situation awareness be achieved? Yes, humans do it all the time. Can it be done on small, ultra-low power, ultra-high throughput processors? Yes 3D stacked analog ASIC circuits enable such processors.

摘要翻译： 电光传感器能够搜索广泛领域并提供包含对系统操作员至关重要的信息的数据流已经取得了显着的进步。 本发明解决的问题是对这些传感器套件的观察结果的准确和及时的解释，以及对实际的低功率，高吞吐量处理器的处理实例，其能够在各种平台上部署。 传感器观察结果的解释也取决于a）一般情况，例如 敌意程度，以及b）抵押资料，例如 平台本身的正常或异常操作。 能否准确及时地实现情况认识？ 是的，人类一直这样做。 可以在小型，超低功耗，超高吞吐量的处理器上完成吗？ 是3D叠层模拟ASIC电路支持这样的处理器。

公开(公告)号：US20160125257A1

公开(公告)日：2016-05-05

申请号：US14581401

申请日：2014-12-23

申请人： Texas Instruments Incorporated

发明人： Jayasree Sankaranarayanan ,  Dipan Kumar Mandal ,  Prashanth R. Viswanath

IPC分类号： G06K9/46 ,  G06K9/62

CPC分类号： G06K9/4638 ,  G06K9/00986 ,  G06K9/4604 ,  G06K9/481 ,  G06K9/6211

摘要： This invention enables effective corner detection of pixels of an image using the FAST algorithm using a vector SIMD processor. This invention loads an 8×8 pixel block that includes four 7×7 pixel blocks including the 16 peripheral pixels to be tested for each of four center pixels. This invention rearranges the 64 pixels of the 8×8 block to form a 16 element array for each center pixel preferably using a vector permutation instruction. This invention uses vector SIMD subtraction and compare and vector SIMD addition and compare to make the FAST algorithm comparisons. The N consecutive pixels determinations of the FAST algorithm are made from the results of plural shift and AND operations. The corresponding center pixel is marked a corner or not a corner dependent upon of the results of plural shift and AND operations.

摘要翻译： 本发明可以使用使用向量SIMD处理器的FAST算法来有效地角度检测图像的像素。 本发明加载包括四个7×7像素块的8×8像素块，包括要测试的四个中心像素中的每一个的16个外围像素。 本发明重新排列8×8块的64个像素，优选地使用向量置换指令来为每个中心像素形成16个元件阵列。 本发明使用矢量SIMD减法和比较和矢量SIMD加法比较，使得FAST算法比较。 FAST算法的N个连续像素确定由多个移位和“与”运算的结果进行。 取决于多个换档和“与”运算的结果，相应的中心像素被标记为拐角或不标记角。