Memory device configured to reduce degradation of adjacent word lines and operating method thereof

    公开(公告)号:US12272403B2

    公开(公告)日:2025-04-08

    申请号:US17955733

    申请日:2022-09-29

    Abstract: An operating method of a memory device includes: acquiring an address of a first bad word line, the first bad word line included in a plurality of word lines of the memory device; detecting whether word lines adjacent to the first bad word line are bad based on the address of the first bad word line, the word lines adjacent to the first bad word line included in the plurality of word lines; designating a first word line among the word lines adjacent to the first bad word line as a prohibited word line, the first word line being detected as a second bad word line; and sending first data via a second word line among the word lines adjacent to the first bad word line, the second word line being detected as a normal word line.

    Electronic device and method for operating high speed screen of electronic device

    公开(公告)号:US12272332B2

    公开(公告)日:2025-04-08

    申请号:US18214560

    申请日:2023-06-27

    Abstract: An electronic device may include: a display configured to display an execution screen of an application, and a processor operatively connected to the display. The processor is configured to: execute the application; receive a frequency event from the application; identify predetermined settings based on the application being executed; determine, based on the frequency event and the predetermined settings, a refresh rate of an execution screen of the application; identify, based on state information of the electronic device and the determined refresh rate, information for controlling operation of a high speed screen; and controlling, based on the identified information, the high speed screen related to the execution screen of the application on the display.

    Apparatus and method for waking up a processor

    公开(公告)号:US12271245B2

    公开(公告)日:2025-04-08

    申请号:US17321633

    申请日:2021-05-17

    Abstract: An apparatus and method for waking up a main processor (MP) in a low power or ultra-low power device preferably includes the MP, and a sub-processor (SP) that utilizes less power than the MP to monitor ambient conditions than the MP, and may be internalized in the MP. The MP and SP can remain in a sleep mode while an interrupt sensor monitors for changes in the ambient environment. A sensor is preferably an interrupt-type sensor, as opposed to polling-type sensors conventionally used to detect ambient changes. The MP and SP may remain in sleep mode, as a low-power or an ultra-low power interrupt sensor operates with the SP being in sleep mode, and awakens the SP via an interrupt indicating a detected change. The SP then wakes the MP after comparing data from the interrupt sensor with values in storage or with another sensor.

    TIMING INFORMATION FOR NETWORK CONTROLLED REPEATERS

    公开(公告)号:US20250113315A1

    公开(公告)日:2025-04-03

    申请号:US18830382

    申请日:2024-09-10

    Abstract: Apparatuses and methods for timing information for network controlled repeaters (NCRs). A method for an NCR includes identifying, by an NCR mobile termination (NCR-MT) entity, first information for a first downlink (DL) frame timing associated with first DL receptions on an NCR control link (C-link) and second information for a second DL frame timing associated with second DL receptions on an NCR backhaul link (BH-link). The method further includes receiving, by the NCR-MT entity on the NCR C-link, a DL signal or channel using the first DL frame timing and receiving, by an NCR forwarding (NCR-Fwd) entity on the NCR BH-link, a first radio frequency signal using the second DL frame timing. The NCR C-link is associated with a first cell on a first carrier frequency. The NCR BH-link is associated with a second cell on a second carrier frequency. The first carrier frequency is different from the second carrier frequency.

    SYSTEMS, METHODS, AND APPARATUS FOR CACHE MANAGEMENT IN A MEMORY DEVICE

    公开(公告)号:US20250110873A1

    公开(公告)日:2025-04-03

    申请号:US18749563

    申请日:2024-06-20

    Abstract: A system may include a memory device including memory media and storage media, wherein the memory device is configured to perform one or more operations including sending access information; receiving address information; and populating, from the storage media, the memory media with data using the address information; and a device including one or more circuits, wherein the one or more circuits is configured to perform one or more operations including receiving, from the memory device, the access information; determining, using the access information and application weights, the address information; and sending, to the memory device, the address information. The one or more circuits may be further configured to perform one or more operations including sending, to a training system, trace information; receiving a weight set from the training system, wherein the weight set is based on the trace information; and modifying the application weights based on the weight set.

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