公开(公告)号：US20090087938A1

公开(公告)日：2009-04-02

申请号：US11863421

申请日：2007-09-28

Applicant: Deepak A. Ramappa ,  Richard L. Guldi

Inventor： Deepak A. Ramappa ,  Richard L. Guldi

IPC: H01L21/00

CPC classification number: H01L23/00 ,  B81C99/0055 ,  H01L21/561 ,  H01L21/6835 ,  H01L24/97 ,  H01L2924/01006 ,  H01L2924/01082 ,  H01L2924/14

Abstract: Current manufacturing of miniature or micro electronic mechanical optical chemical or biophysical devices utilizes discrete substrates holding one or more said devices. The use of discrete substrates entails several disadvantages with respect to economical manufacturing. This invention is a method of manufacturing devices using flexible carrier sheets with device substrates attached to the carrier sheet, storage/transport devices for the carrier sheet, and process tools capable of continuous processing of the carrier sheets.

Abstract translation: 微型或微电子机械光学化学或生物物理器件的当前制造利用保持一个或多个所述器件的分立衬底。 使用分立的基板在经济制造方面需要几个缺点。 本发明是一种制造使用柔性载体片的装置的方法，其具有连接到载体片的装置基底，用于载体片的存储/输送装置和能够连续处理载体片的加工工具。

公开(公告)号：US20090017564A1

公开(公告)日：2009-01-15

申请号：US12234820

申请日：2008-09-22

Applicant: Deepak A. Ramappa

Inventor： Deepak A. Ramappa

IPC: H01L21/66 ,  G01R31/26

CPC classification number: G01R31/307

Abstract: The present invention provides a method detecting metal silicide defects in a microelectronic device. The method comprises positioning (110) a portion of a semiconductor substrate in a field of view of an inspection tool. The method also comprises producing (120) a voltage contrast image of the portion, wherein the image is obtained using a collection field that is stronger than an incident field. The method further comprises using (130) the voltage contrast image to determine a metal silicide defect in a microelectronic device. Other aspects of the present invention include an inspection system (200) for detecting metal silicide defects and a method of manufacturing an integrated circuit (300).

Abstract translation: 本发明提供一种检测微电子器件中的金属硅化物缺陷的方法。 该方法包括在检查工具的视野中定位（110）半导体衬底的一部分。 该方法还包括产生（120）该部分的电压对比度图像，其中使用比入射场强的收集场获得图像。 该方法还包括使用（130）电压对比图像来确定微电子器件中的金属硅化物缺陷。 本发明的其他方面包括用于检测金属硅化物缺陷的检查系统（200）和制造集成电路（300）的方法。

公开(公告)号：US20080299718A1

公开(公告)日：2008-12-04

申请号：US11757147

申请日：2007-06-01

Applicant: Ping Jiang ,  Deepak A. Ramappa

Inventor： Ping Jiang ,  Deepak A. Ramappa

IPC: H01L21/336 ,  H01L21/4763

CPC classification number: H01L21/76808 ,  H01L29/78

Abstract: A method of forming single or dual damascene interconnect structures using either a via-first or trench first approach includes the steps of providing a substrate surface having an etch-stop layer thereon, a low-k dielectric layer on the etch-stop layer, and a dielectric capping layer on the low-k dielectric layer. In the single damascene process using trench pattern, a trench is etched through the capping layer, the low-k dielectric layer and the etch-stop layer to reach the substrate surface. In the via-first process, using a via pattern, the via is etched through the capping layer, the low-k dielectric layer and the etch-stop layer to reach the substrate surface. In the trench first process, using the via pattern the via is etched through the capping layer, the low-k dielectric layer and the etch-stop layer to reach the substrate surface. In the single damascene or either via-first or trench-first dual damascene embodiment, the capping layer is retained over the low-k dielectric layer on top surfaces of the trench into the metal processing, generally including CMP processing, wherein the CMP process removes at least a portion, and in one embodiment the entire, capping layer.

Abstract translation: 使用通孔或沟槽第一方法形成单个或双镶嵌互连结构的方法包括以下步骤：提供其上具有蚀刻停止层的衬底表面，蚀刻停止层上的低k电介质层，以及 在低k电介质层上的介电覆盖层。 在使用沟槽图案的单个镶嵌工艺中，通过覆盖层，低k电介质层和蚀刻停止层蚀刻沟槽以到达衬底表面。 在通孔第一工艺中，使用通孔图案，通过覆盖层，低k电介质层和蚀刻停止层蚀刻通孔以到达衬底表面。 在沟槽第一工艺中，使用通孔图案，通过覆盖层，低k电介质层和蚀刻停止层蚀刻通孔以到达衬底表面。 在单镶嵌或通过第一或第一沟槽的双镶嵌实施例中，覆盖层保留在沟槽顶表面上的低k介电层上，进入金属加工，通常包括CMP处理，其中CMP工艺移除 至少一部分，并且在一个实施方案中为整个封盖层。

公开(公告)号：US07443189B2

公开(公告)日：2008-10-28

申请号：US11049109

申请日：2005-02-02

Applicant: Deepak A. Ramappa

Inventor： Deepak A. Ramappa

IPC: G01R31/06

CPC classification number: G01R31/307

Abstract: The present teachings provide methods for detection of metal silicide defects in a microelectronic device. In an exemplary embodiment, a portion of a semiconductor substrate may be positioned in a field of view of an inspection tool. The method also includes producing (120) a voltage contrast image of the portion, wherein the image is obtained using a collection field that is stronger than an incident field. The method also includes using (130) the voltage contrast image to determine a metal silicide defect in a microelectronic device. Other embodiments include an inspection system (200) for detecting metal silicide defects and a method of manufacturing an integrated circuit (300).

Abstract translation: 本教导提供了用于检测微电子器件中的金属硅化物缺陷的方法。 在示例性实施例中，半导体衬底的一部分可以位于检查工具的视野内。 该方法还包括产生（120）该部分的电压对比度图像，其中使用比入射场强的收集场获得图像。 该方法还包括使用（130）电压对比图像来确定微电子器件中的金属硅化物缺陷。 其他实施例包括用于检测金属硅化物缺陷的检查系统（200）和制造集成电路（300）的方法。

公开(公告)号：US07268073B2

公开(公告)日：2007-09-11

申请号：US10985193

申请日：2004-11-10

Applicant: Deepak A. Ramappa ,  Mona Eissa ,  Christopher Lyle Borst ,  Ting Y. Tsui

Inventor： Deepak A. Ramappa ,  Mona Eissa ,  Christopher Lyle Borst ,  Ting Y. Tsui

IPC: H01L21/44

CPC classification number: H01L21/76886 ,  H01L21/7684

Abstract: Methods (102) are presented for protecting copper structures (26) from corrosion in the fabrication of semiconductor devices (2), wherein a thin semiconductor or copper-semiconductor alloy corrosion protection layer (30) is formed on an exposed surface (26a) of a copper structure (26) prior to performance of metrology operations (206), so as to inhibit corrosion of the copper structure (26). All or a portion of the corrosion protection layer (30) is then removed (214) in forming an opening in an overlying dielectric (44) in a subsequent interconnect layer.

Abstract translation: 在半导体器件（2）的制造中提出了用于保护铜结构（26）免受腐蚀的方法（102），其中在暴露表面（26a）上形成薄的半导体或铜 - 半导体合金腐蚀保护层（30） 在执行计量操作（206）之前，铜结构（26），以便抑制铜结构（26）的腐蚀。 然后在随后的互连层中在覆盖电介质（44）中形成开口的全部或一部分腐蚀保护层（30）被去除（214）。