摘要:
Thin film transistors and fabrication methods thereof. A gate is formed overlying a portion of a substrate. A first vanadium oxide layer formed overlying the gate and the substrate. A gate-insulating layer is formed overlying the first vanadium oxide layer. A semiconductor layer is formed on a portion of the gate-insulating layer. A source and a drain are formed on a portion of the semiconductor layer.
摘要:
A driving voltage adjusting device for a microelectromechanical optical (MEMO) device. The adjusting device comprises a parameter generator and a driving device. The driving device outputs an adjusting driving voltage to the MEMO device to a parameter from the parameter generator.
摘要:
A photo detector has a sensing TFT (thin film transistor) and a photodiode. The sensing TFT has a gate and a base. The photodiode has an intrinsic semiconductor region electrically connected to the gate and the base of the sensing TFT. The sensing TFT and the photodiode both have a structure comprising low temperature poly-silicon. A display panel contains the photo detector is also disclosed.
摘要:
The present invention relates to novel methods for producing a nano-porous gas diffusion media, compositions thereof, and devices comprising the same. The nano-porous gas diffusion media of the invention is produced using photolithographic techniques to create a solid substrate comprising a plurality of nano-scale (1 nm-300 μm) pores or holes that allow for the diffusion or exchange of molecules, gases, and/or liquids through the substrate. The nano-porous diffusion media of the invention also displays superior electro- and thermal conductivity, and increased durability and performance. In some embodiments, the nano-porous diffusion media of the invention is also coated with a self-assembling monolayer (SAM) of organic molecules to further improve its physical characteristics.
摘要:
A method for forming a thin film transistor on a substrate is disclosed. A gate electrode and a gate insulation layer are disposed on a surface of the substrate. A deposition process is performed by utilizing hydrogen diluted silane to form a silicon-contained thin film on the gate insulation layer first. A hydrogen plasma etching process is thereafter performed. The deposition process and the etching process are repeated for at least one time to form an interface layer. Finally, an amorphous silicon layer, n+ doped Si layers, a source electrode, and a drain electrode are formed on the interface layer.
摘要:
A power transistor comprises a gate region, a source region, and a drain region. The gate region comprises a first line portion, a second line portion, and a third line portion. The first line portion couples to the second line portion so as to form a first V-shaped structure. The second line portion couples to the third line portion so as to form a second V-shaped structure. The first line portion, the second line portion, and the third line portion form a N-shaped structure.
摘要:
A method for forming a thin film transistor on a substrate is disclosed. A gate electrode and a gate insulation layer are disposed on a surface of the substrate. A deposition process is performed by utilizing hydrogen diluted silane to form a silicon-contained thin film on the gate insulation layer first. A hydrogen plasma etching process is thereafter performed. The deposition process and the etching process are repeated for at least one time to form an interface layer. Finally, an amorphous silicon layer, n+ doped Si layers, a source electrode, and a drain electrode are formed on the interface layer.
摘要:
A method for forming a thin film transistor on a substrate is disclosed. A gate electrode and a gate insulation layer are disposed on a surface of the substrate. A deposition process is performed by utilizing hydrogen diluted silane to form a silicon-contained thin film on the gate insulation layer first. A hydrogen plasma etching process is thereafter performed. The deposition process and the etching process are repeated for at least one time to form an interface layer. Finally, an amorphous silicon layer, n+ doped Si layers, a source electrode, and a drain electrode are formed on the interface layer.
摘要:
A photo detector has a sensing TFT (thin film transistor) and a photodiode. The sensing TFT has a gate and a base. The photodiode has an intrinsic semiconductor region electrically connected to the gate and the base of the sensing TFT. The sensing TFT and the photodiode both have a structure comprising low temperature poly-silicon. A display panel contains the photo detector is also disclosed.
摘要:
A photo detector is disclosed. The photo detector includes a substrate, a first patterned semiconductor layer with a first state, a dielectric layer, a patterned conductive layer, an inter-layer dielectric, a second patterned semiconductor layer with a second state, two first electrodes disposed on the inter-layer dielectric and two second electrodes disposed on portions of the second semiconductor layer. The first patterned semiconductor layer having a first doping region and a second doping region is disposed on a transistor region of the substrate. The dielectric layer is disposed to cover the substrate and the first semiconductor layer, the patterned conductive layer is disposed on the dielectric layer, and the inter-layer dielectric having at least two openings adapted to expose the first doping region and the second doping region is disposed to cover the dielectric layer. The second patterned semiconductor layer is disposed on a photosensitive region and the first electrodes are electrically connected to the first patterned semiconductor layer.