公开(公告)号：US06392284B1

公开(公告)日：2002-05-21

申请号：US09353576

申请日：1999-07-15

Applicant: Randhir P. S. Thakur ,  Garry A. Mercaldi ,  Michael Nuttall

Inventor： Randhir P. S. Thakur ,  Garry A. Mercaldi ,  Michael Nuttall

IPC: H01L2900

CPC classification number: G11C11/404 ,  G11C17/16 ,  H01L21/28568 ,  H01L21/76888 ,  H01L27/1085 ,  H01L28/60

Abstract: A semiconductor structure includes a dielectric layer having first and second opposing sides. A conductive layer is adjacent to the first side of the dielectric layer and is coupled to a first terminal, and a conductive barrier layer is adjacent to the second side of the dielectric layer and is coupled to a second terminal. The conductive barrier layer may be formed from tungsten nitride, tungsten silicon nitride, titanium silicon nitride or other barrier materials.

Abstract translation: 半导体结构包括具有第一和第二相对侧的电介质层。 导电层与电介质层的第一侧相邻并且耦合到第一端子，并且导电阻挡层与电介质层的第二侧相邻并耦合到第二端子。 导电阻挡层可以由氮化钨，氮化钨，氮化钛或其它阻挡材料形成。

公开(公告)号：US06316370B1

公开(公告)日：2001-11-13

申请号：US09644699

申请日：2000-08-24

Applicant: Garry A. Mercaldi ,  Donald L. Yates

Inventor： Garry A. Mercaldi ,  Donald L. Yates

IPC: H01L21461

CPC classification number: H01L21/32134

Abstract: The present invention provides an etching composition which includes a polyhydric alcohol in combination with two inorganic acids. Preferably the etching composition of the present invention is a mixture of a glycol, nitric acid and hydrofluoric acid, with propylene glycol being preferred. The etching composition of the present invention achieves a selectivity of greater than 70:1, doped material to undoped material. The present invention provides an etching formulation which has increased selectivity of doped polysilicon to undoped polysilicon and provides an efficient integrated circuit fabrication process without requiring time consuming and costly processing modifications to the etching apparatus or production apparatus.

Abstract translation: 本发明提供一种蚀刻组合物，其包含与两种无机酸组合的多元醇。 优选地，本发明的蚀刻组合物是二醇，硝酸和氢氟酸的混合物，优选丙二醇。 本发明的蚀刻组合物实现大于70:1的掺杂材料对未掺杂材料的选择性。 本发明提供了一种蚀刻配方，其具有增加掺杂多晶硅对未掺杂多晶硅的选择性，并且提供了有效的集成电路制造工艺，而不需要对蚀刻设备或生产设备进行耗时且昂贵的处理修改。

公开(公告)号：US5969983A

公开(公告)日：1999-10-19

申请号：US260994

申请日：1999-03-01

Applicant: Randhir P. S. Thakur ,  Garry A. Mercaldi ,  Michael Nuttall

Inventor： Randhir P. S. Thakur ,  Garry A. Mercaldi ,  Michael Nuttall

IPC: G11C11/404 ,  G11C17/16 ,  H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8242 ,  G11C11/24

CPC classification number: G11C11/404 ,  G11C17/16 ,  H01L21/28568 ,  H01L21/76888 ,  H01L27/1085 ,  H01L28/60

Abstract: A semiconductor structure includes a dielectric layer having first and second opposing sides. A conductive layer is adjacent to the first side of the dielectric layer and is coupled to a first terminal, and a conductive barrier layer is adjacent to the second side of the dielectric layer and is coupled to a second terminal. The conductive barrier layer may be formed from tungsten nitride, tungsten silicon nitride, titanium silicon nitride or other barrier materials.