Abstract:
A memory device includes a first controller and a second controller. The first controller receives a first command from a host and stores the first command in a first command queue, and transmits the first command to the second controller relating to the first command stored in the first command queue. The second controller transmits the first command stored in the second command queue to a flash memory.
Abstract:
A method and apparatus transmitting and receiving in a real-time system are disclosed. The method of transmitting in a real-time system includes scheduling a task included in a socket based on a predetermined transmission option designated to the socket, and transmitting a packet generated by the scheduled task based on the predetermined transmission option, so that real-time communications of a network communication can be secured and resources of the system can be efficiently used, thereby, transmitting and receiving data according to the required characteristics of transmission and reception.
Abstract:
A method of reducing a code size of a program by controlling a control flow of the program using software in a computer system is disclosed. The method includes the steps of storing a first program count of a first instruction in a first buffer when an error occurs while the first instruction having an Operand including Offset and Length is being executed among a plurality of instructions loaded in the code memory, changing a current program count of the code memory to a second program count which is obtained by adding the Offset to the first program count, storing a second instruction, which is located at a position shifted from the second program count by a value of the Length, in a second buffer, replacing the second instruction with a third instruction, which is not recognized by a microprocessor, replacing the third instruction with the second instruction stored in the second buffer when an error occurs while the third instruction is being executed, and changing the current program count of the code memory to a predetermined program count next to the first program count stored in the first buffer.
Abstract:
A memory device includes a data block storing first data, and a log block storing second data that is an updated value of the first data. A spare area of the log block stores a first mapping table including mapping information between the first data and the second data.
Abstract:
A memory device may include a non-volatile memory and non-volatile RAM. The non-volatile memory may include a data block and a metadata block. Metadata information with respect to the data block may be included in the metadata block. A portion of metadata with respect to the data block or the metadata with respect to the metadata block may be stored in the non-volatile RAM.
Abstract:
A memory device includes a first controller and a second controller. The first controller receives a first command from a host and stores the first command in a first command queue, and transmits the first command to the second controller relating to the first command stored in the first command queue. The second controller transmits the first command stored in the second command queue to a flash memory.
Abstract:
A method and apparatus for managing a memory are provided. It is possible to rapidly recover the area allocated or desired to be returned by easily recognizing a range of the area allocated or desired to be returned over the entire area of the memory by recognizing an original area of a predetermined memory chunk interrupted by a neighboring memory chunk among a series of memory chunks that make up the memory by considering an original area of the neighboring memory chunk and by recovering the predetermined memory chunk and the recognized area to their original areas, when the area allocated to or returned by an application program is interrupted.
Abstract:
A memory device may include a non-volatile memory and non-volatile RAM. The non-volatile memory may include a data block and a metadata block. Metadata information with respect to the data block may be included in the metadata block. A portion of metadata with respect to the data block or the metadata with respect to the metadata block may be stored in the non-volatile RAM.
Abstract:
A virtual architecture generating apparatus and method, a runtime system, a multi-core system, and methods of operating the runtime system and the multi-core system may include analyzing a requirement of an application, a feature of the application, and a requirement of a system enabling an execution of the application, and include generating a virtual architecture corresponding to the application, based on a physical architecture of a reconfigurable processor, the analyzed requirements and the analyzed feature.
Abstract:
A memory device includes a data block storing first data, and a log block storing second data that is an updated value of the first data. A spare area of the log block stores a first mapping table including mapping information between the first data and the second data.