Reducing Border Width Around a Hole in Display Active Area

    公开(公告)号:US20210305350A1

    公开(公告)日:2021-09-30

    申请号:US17145815

    申请日:2021-01-11

    Applicant: Apple Inc.

    Abstract: An electronic device may include a display having display pixels formed in an active area of the display. The display further includes display driver circuitry for driving gate lines that are routed across the display. A hole such as a through hole, optical window, or other inactive region may be formed within the active area of the display. Multiple gate lines carrying the same signal may be merged together prior to being routed around the hole to help minimize the routing line congestion around the border of the hole. Dummy circuits may be coupled to the merged segment portion to help increase the parasitic loading on the merged segments. The hole may have a tapered shape to help maximize the size of the active area. The hole may have an asymmetric shape to accommodate multiple sub-display sensor components.

    Displays with Gate Driver Circuitry Having Shared Register Circuits

    公开(公告)号:US20210035499A1

    公开(公告)日:2021-02-04

    申请号:US16828052

    申请日:2020-03-24

    Applicant: Apple Inc.

    Abstract: Electronic devices may include displays having organic light-emitting diode pixels, display driver circuitry, and gate driver circuitry. To reduce the amount of space occupied in the inactive area of a display by the gate driver circuitry, one or more of the shift registers in the gate driver circuitry may include register circuits that are shared by multiple rows of pixels. Different drivers may use different clock frequencies to ensure synchronous operation of the display even when some register circuits share pixel rows. For increased flexibility in the arrangement of the register circuits in the shift registers, one or more of the shift registers may be split across the active area of the display. In some cases, one of the emission drivers may be omitted from the gate driver circuitry and a single emission driver may provide multiple emission control signals for the pixels.

    Electronic devices with low refresh rate display pixels

    公开(公告)号:US10741121B2

    公开(公告)日:2020-08-11

    申请号:US16379323

    申请日:2019-04-09

    Applicant: Apple Inc.

    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

    Electronic Devices With Low Refresh Rate Display Pixels

    公开(公告)号:US20200098314A1

    公开(公告)日:2020-03-26

    申请号:US16696578

    申请日:2019-11-26

    Applicant: Apple Inc.

    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

    Displays with multiple scanning modes

    公开(公告)号:US10546540B1

    公开(公告)日:2020-01-28

    申请号:US16577597

    申请日:2019-09-20

    Applicant: Apple Inc.

    Abstract: An electronic device may include a display such as a light-emitting diode display. The electronic device may be a head-mounted device that provides a virtual reality or augmented reality environment to a user. To reduce artifacts in the display, a display may be operable in both a normal scanning mode and a partial scanning mode. In the normal scanning mode, every row of the display may be enabled to emit light in each frame. In the partial scanning mode, only a subset of the rows of the display may be enabled to emit light in each frame. The display may have a higher refresh rate in the partial scanning mode than in the normal scanning mode. To ensure uniform transistor stress across the display, the scanning driver for the display may scan the disabled rows in the partial scanning mode even though the rows will not be used to emit light.

    Electronic devices with low refresh rate display pixels

    公开(公告)号:US10304378B2

    公开(公告)日:2019-05-28

    申请号:US15996366

    申请日:2018-06-01

    Applicant: Apple Inc.

    Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

    Devices and methods for preventing image artifacts on touch sensitive electronic displays

    公开(公告)号:US10042409B2

    公开(公告)日:2018-08-07

    申请号:US14986371

    申请日:2015-12-31

    Applicant: Apple Inc.

    Abstract: Methods and devices useful in discharging an aberrant charge on a touch sensitive display of an electronic device are provided. By way of example, a an electronic device includes a power management and control circuitry configured to receive a first voltage signal and a second voltage signal from a display subsystem of a display of the electronic device, receive a third voltage signal from a touch subsystem of the display, provide a power signal to the display subsystem to activate the display subsystem when the display is determined to be in a temporarily inactive state. Providing the power signal to the display subsystem comprises discharging an aberrant charge based on the third voltage signal.

    Display Border Area with Dual Trench Structures
    49.
    发明申请
    Display Border Area with Dual Trench Structures 审中-公开
    显示双沟槽结构的边界

    公开(公告)号:US20170003526A1

    公开(公告)日:2017-01-05

    申请号:US14923178

    申请日:2015-10-26

    Applicant: Apple Inc.

    CPC classification number: G02F1/1339 G02F1/1345

    Abstract: A display may have an active area surrounded by a border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. The liquid crystal layer may be retained within the display using a ring of sealant that is dispensed along the border area on the thin-film transistor layer. The thin-film transistor layer may include at least a substrate, a dielectric layer formed over the substrate, a first planarization layer formed on the dielectric layer, and a second planarization layer formed on the first planarization layer. A first continuous trench structure may be formed along the border of the display to help prevent moisture seepage. A second trench structure that is separate from the first trench structure may be formed along the border of the display to help provide proper sealant adhesion.

    Abstract translation: 显示器可以具有由边界区域包围的活动区域。 显示器可以是具有夹在滤色器层和薄膜晶体管层之间的液晶层的液晶显示器。 可以使用沿着薄膜晶体管层的边界区域分配的密封剂环将液晶层保持在显示器内。 薄膜晶体管层可以至少包括衬底,形成在衬底上的电介质层,形成在电介质层上的第一平坦化层和形成在第一平坦化层上的第二平坦化层。 可以沿着显示器的边界形成第一连续沟槽结构以帮助防止湿气渗透。 可以沿着显示器的边界形成与第一沟槽结构分离的第二沟槽结构,以帮助提供适当的密封剂粘附。

    Display with Multilayer and Embedded Signal Lines
    50.
    发明申请
    Display with Multilayer and Embedded Signal Lines 审中-公开
    显示多层和嵌入式信号线

    公开(公告)号:US20150261032A1

    公开(公告)日:2015-09-17

    申请号:US14673645

    申请日:2015-03-30

    Applicant: Apple Inc.

    CPC classification number: G02F1/13454 G02F1/133528 G02F1/136286 G02F1/1368

    Abstract: A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.

    Abstract translation: 显示器可以具有带有衬底层的薄膜晶体管层。 电介质层可以形成在衬底层上,并且可以具有上表面和下表面。 薄膜晶体管层可以包括显示像素阵列。 数据线和栅极线可以向显示像素提供信号。 显示器的非活动外围部分中的栅极驱动器电路可以包括用于每个栅极线的栅极驱动器电路。 栅极驱动器电路可以包括形成在电介质层的上表面上的薄膜晶体管。 耦合在栅极驱动电路和公共电极线之间的诸如栅极低线,栅极布线线的信号线可以由两个或更多个金属层形成以减小它们的宽度,或者可以嵌入在上部的电介质层之间 和薄膜晶体管下的下表面。

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