公开(公告)号：US07269811B1

公开(公告)日：2007-09-11

申请号：US10340005

申请日：2003-01-10

申请人： Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey D. Stroomer

发明人： Jonathan B. Ballagh ,  Roger B. Milne ,  Jeffrey D. Stroomer

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5045 ,  G06F2217/62

摘要： A method of specifying clock domains in electronic circuit designs in a system level design tool is disclosed. The method generally comprises steps of providing a design having a plurality of functional blocks; incorporating a clock tag block within the design; and setting a clock domain provided by the clock tag block for a functional block of the plurality of functional blocks. A design tool enabling the association of clock domains with functional blocks in a system is also disclosed. The design tool generally comprises a plurality of functional blocks; a clock tag block having a predetermined clock rate; and a user interface enabling the selection of the functional blocks and the clock tag block in a design. The clock tag block provides a clock rate for at least one functional block of the plurality of functional blocks.

摘要翻译： 公开了一种在系统级设计工具中指定电子电路设计中的时钟域的方法。 该方法通常包括提供具有多个功能块的设计的步骤; 在设计中加入时钟标签块; 以及设置由所述时钟标签块提供的用于所述多个功能块的功能块的时钟域。 还公开了一种使时钟域与系统中的功能块相关联的设计工具。 该设计工具通常包括多个功能块; 具有预定时钟频率的时钟标签块; 以及能够在设计中选择功能块和时钟标签块的用户界面。 时钟标签块为多个功能块中的至少一个功能块提供时钟速率。

公开(公告)号：US07068071B1

公开(公告)日：2006-06-27

申请号：US10970962

申请日：2004-10-22

申请人： Roger B. Milne ,  Jonathan B. Ballagh

发明人： Roger B. Milne ,  Jonathan B. Ballagh

IPC分类号： H03K7/38

CPC分类号： H03K19/17736 ,  H03K19/17732 ,  H03K19/1774

摘要： An integrated circuit with overclocked embedded logic circuitry is described. In an example, a programmable logic device includes programmable logic blocks operable using a first clock signal having a first frequency. A dedicated logic circuit embedded within the programmable logic device is operable using a second clock signal synchronized with the first clock signal and having a second frequency, the second frequency being a multiple of the first frequency. An interface coupled between one or more of the programmable logic blocks and the dedicated logic circuit includes multiplexer circuitry to multiplex output signals produced by the one or more programmable logic blocks among input terminals of the dedicated logic circuit.

摘要翻译： 描述了具有超频嵌入式逻辑电路的集成电路。 在一个示例中，可编程逻辑器件包括可使用具有第一频率的第一时钟信号操作的可编程逻辑块。 嵌入在可编程逻辑器件内的专用逻辑电路使用与第一时钟信号同步并具有第二频率的第二时钟信号来工作，第二频率是第一频率的倍数。 耦合在一个或多个可编程逻辑块和专用逻辑电路之间的接口包括多路复用器电路，用于在专用逻辑电路的输入端之间复用由一个或多个可编程逻辑块产生的输出信号。

公开(公告)号：US08768981B1

公开(公告)日：2014-07-01

申请号：US12870734

申请日：2010-08-27

申请人： Roger B. Milne ,  Sean A. Kelly

发明人： Roger B. Milne ,  Sean A. Kelly

IPC分类号： G06F17/30

CPC分类号： G06F17/30194

摘要： A system and method for distributing and accessing files in a distributed storage system uses an ordered list of the storage nodes in the system to determine the storage node on which a file is stored. The distributed storage system includes a cluster of storage nodes and may also include one or more client nodes that participate in the system as storage resources. Each node (client and storage) stores an ordered list of the storage nodes in the system, allowing any of the nodes to access the file. The list is updated whenever a new storage node is added to the system, an existing storage node is removed from the system, or a new storage node is swapped with an existing storage node. Each one of the nodes may independently compute a new mapping of files to the storage nodes when the ordered list is changed.

摘要翻译： 用于在分布式存储系统中分发和访问文件的系统和方法使用系统中的存储节点的有序列表来确定存储文件的存储节点。 分布式存储系统包括一组存储节点，并且还可以包括作为存储资源参与系统的一个或多个客户机节点。 每个节点（客户端和存储）存储系统中存储节点的有序列表，允许任何节点访问该文件。 每当将新的存储节点添加到系统时，将更新列表，将现有存储节点从系统中删除，或者使用现有存储节点交换新的存储节点。 当有序列表改变时，每个节点可以独立地计算文件到存储节点的新映射。

公开(公告)号：US07725869B1

公开(公告)日：2010-05-25

申请号：US11101075

申请日：2005-04-07

申请人： Roger B. Milne ,  Haibing Ma

发明人： Roger B. Milne ,  Haibing Ma

IPC分类号： G06F17/50

CPC分类号： G06F17/5045

摘要： Method and apparatus for modeling multiple instances of an electronic circuit using an imperative programming language description is described. In one example, a program is defined using an imperative programming language. The program includes multiple calls to a function. The function includes a persistent variable associated with an internal state of the electronic circuit. The function is configured to initialize the persistent variable based on at least one call path to the function in the program.

摘要翻译： 描述了使用命令式编程语言描述来对电子电路的多个实例进行建模的方法和装置。 在一个示例中，使用命令式编程语言来定义程序。 该程序包括对一个功能的多次调用。 该功能包括与电子电路的内部状态相关联的持久变量。 该功能被配置为基于程序中功能的至少一个调用路径来初始化持久变量。

公开(公告)号：US07143369B1

公开(公告)日：2006-11-28

申请号：US10388936

申请日：2003-03-14

申请人： Roger B. Milne

发明人： Roger B. Milne

IPC分类号： G06F17/50

CPC分类号： G06F17/5022

摘要： Method and apparatus for simulating operations of a circuit design that includes high-level components and HDL components. Groups of HDL components are associated with different co-simulation engines. The high-level components of the design are simulated in a high-level modeling system (HLMS), and the HDL components in each group are simulated on the associated co-simulation engine.

摘要翻译： 用于模拟包括高级组件和HDL组件的电路设计操作的方法和装置。 一组HDL组件与不同的共模拟引擎相关联。 设计的高级组件在高级建模系统（HLMS）中进行仿真，每组中的HDL组件都在相关的协同仿真引擎上进行仿真。

公开(公告)号：US08675014B1

公开(公告)日：2014-03-18

申请号：US12870669

申请日：2010-08-27

申请人： Roger B. Milne ,  Jeffrey C. Ward

发明人： Roger B. Milne ,  Jeffrey C. Ward

IPC分类号： G09G5/00

CPC分类号： G06F3/04842

摘要： A computer-implemented method for efficiently detecting graphics objects near a selected point in an application is disclosed. The method implements a two-stage selection technique. In a first stage, a set of one or more graphics objects that are considered equally good candidates for selection is determined, and in a second stage one of the graphics objects from the set is ultimately selected based on certain other selection criteria. In the first stage, the application determines if a selected pixel overlaps with any graphics objects. If the selected pixel does not overlap with any graphics objects, then the application determines whether one of a set of cursor footprints overlap with any graphics objects. If multiple graphics objects overlap the selected pixel, or the minimum sized cursor footprint, then, in a second stage, one of the multiple graphics objects is selected based on certain other selection criteria.

摘要翻译： 公开了一种用于有效地检测应用中所选点附近的图形对象的计算机实现的方法。 该方法实现了两阶段选择技术。 在第一阶段中，确定被认为是同样好的选择候选者的一组或多个图形对象的集合，并且在第二阶段中，根据某些其他选择标准最终选择来自集合的一个图形对象。 在第一阶段，应用程序确定所选像素是否与任何图形对象重叠。 如果所选择的像素与任何图形对象不重叠，则应用程序确定一组光标覆盖区中的一个是否与任何图形对象重叠。 如果多个图形对象与所选择的像素重叠或最小尺寸的光标占用，则在第二阶段中，基于某些其他选择标准来选择多个图形对象之一。

公开(公告)号：US08427483B1

公开(公告)日：2013-04-23

申请号：US12871759

申请日：2010-08-30

申请人： Jeffrey C. Ward ,  Jonathan Ballagh ,  Tyson Stecklein ,  Roger B. Milne

发明人： Jeffrey C. Ward ,  Jonathan Ballagh ,  Tyson Stecklein ,  Roger B. Milne

IPC分类号： G06T13/00

CPC分类号： G06T13/80 ,  G06T2210/12

摘要： Techniques for associating a graphics object with one of a plurality of target regions of a graphical object template are disclosed. The graphics object is associated with one of the target regions based on the distance between the center of mass of the graphics object and the center of mass of the target region and the overlap amount of the graphics object with the target region. A pre-generated graphics object (stamp object) may also be automatically incorporated into one of the target regions based on the alignment of the minimum bounding box of the stamp object and the minimum bounding box of the target region.

公开(公告)号：US08290919B1

公开(公告)日：2012-10-16

申请号：US12870739

申请日：2010-08-27

申请人： Sean A. Kelly ,  Roger B. Milne

发明人： Sean A. Kelly ,  Roger B. Milne

IPC分类号： G06F7/00 ,  G06F17/00

CPC分类号： G06F17/30097 ,  G06F17/302

摘要： A system and method for distributing and accessing files in a distributed storage system uses an ordered list of the storage nodes in the system to determine the storage node on which a file is stored. The distributed storage system includes a cluster of storage nodes and may also include one or more client nodes that participate in the system as storage resources. Each node (client and storage) stores an ordered list of the storage nodes in the system, allowing any of the nodes to access the file. The list is updated whenever a new storage node is added to the system, an existing storage node is removed from the system, or a new storage node is swapped with an existing storage node. Each one of the nodes may independently compute a new mapping of files to the storage nodes when the ordered list is changed.

摘要翻译： 用于在分布式存储系统中分发和访问文件的系统和方法使用系统中的存储节点的有序列表来确定存储文件的存储节点。 分布式存储系统包括一组存储节点，并且还可以包括作为存储资源参与系统的一个或多个客户机节点。 每个节点（客户端和存储）存储系统中存储节点的有序列表，允许任何节点访问该文件。 每当将新的存储节点添加到系统时，将更新列表，将现有存储节点从系统中删除，或者使用现有存储节点交换新的存储节点。 当有序列表改变时，每个节点可以独立地计算文件到存储节点的新映射。

公开(公告)号：US07685554B1

公开(公告)日：2010-03-23

申请号：US11185125

申请日：2005-07-20

申请人： Sean A. Kelly ,  Roger B. Milne ,  Jeffrey D. Stroomer ,  Sreekanth Juttu

发明人： Sean A. Kelly ,  Roger B. Milne ,  Jeffrey D. Stroomer ,  Sreekanth Juttu

IPC分类号： G06F17/50

CPC分类号： G06F17/505

摘要： Determining data rates and data types in a an electronic design. In one embodiment, an electronic design is created in a memory arrangement in response to user input. The electronic design includes a plurality of functional blocks and a plurality of nets connecting the functional blocks. In response to user input, an output data rate and an output data type of data output from at least one of the functional blocks are determined. The input data rate and input data type to each functional block coupled via a net to the at least one functional block are equal to the output data rate and output data type, respectively, from the at least one functional block. For each functional block, an output data rate and output data type are determined as a function of the input data rate and the input data type of the functional block.

摘要翻译： 确定电子设计中的数据速率和数据类型。 在一个实施例中，响应于用户输入在存储器装置中创建电子设计。 电子设计包括多个功能块和连接功能块的多个网。 响应于用户输入，确定从至少一个功能块输出的输出数据速率和输出数据类型的数据。 经由网络耦合到至少一个功能块的每个功能块的输入数据速率和输入数据类型分别等于来自至少一个功能块的输出数据速率和输出数据类型。 对于每个功能块，输出数据速率和输出数据类型根据输入数据速率和功能块的输入数据类型来确定。

公开(公告)号：US07386814B1

公开(公告)日：2008-06-10

申请号：US11054864

申请日：2005-02-10

申请人： Jeffrey D. Stroomer ,  Roger B. Milne ,  Isaac W. Foraker ,  Sean A. Kelly

发明人： Jeffrey D. Stroomer ,  Roger B. Milne ,  Isaac W. Foraker ,  Sean A. Kelly

IPC分类号： G06F17/50

CPC分类号： G06F17/5045

摘要： Translation of high-level design blocks into a design specification in a hardware description language (HDL). Each block in the high-level design is assigned to a group. A set of attributes is identical between the blocks in a group. For each group of blocks, a respective set of parameters having different values on subblocks of at least two blocks in the group is determined. An HDL specification is generated for each group. The HDL specification for a group has for each parameter in the set of parameters, a parameter input.

摘要翻译： 将高级设计块翻译成硬件描述语言（HDL）的设计规范。 高级设计中的每个块都分配给一个组。 一组属性在组中的块之间是相同的。 对于每组块，确定组中至少两个块的子块上具有不同值的相应参数集合。 为每个组生成HDL规范。 组的HDL规范对参数集中的每个参数都有参数输入。