公开(公告)号：US10686582B1

公开(公告)日：2020-06-16

申请号：US16285056

申请日：2019-02-25

Applicant: Intel Corporation

Inventor： Gerald Pasdast ,  Nasser A. Kurd ,  Peipei Wang ,  Yingyu Miao ,  Lakshmipriya Seshan ,  Ishaan S. Shah

IPC: H04L7/00 ,  H03L7/081 ,  H03L7/093 ,  H03K5/00 ,  G06F1/08 ,  G06F1/10 ,  G06F1/06 ,  H03K3/037

Abstract: An apparatus and method is provided that compensates for the supply droops to minimize strobe shifts and to regain eye margin. The apparatus includes a droop detector to detect voltage droops at one or more trip (or threshold) levels and these detected voltage droops are translated to a shift in clock phase setting. For example, propagation delay of a delay locked loop (DLL) and/or clock edge selection from a phase interpolator (PI) is adjusted according to the detected voltage droop levels to maintain a trained relationship between the sampling clock strobe and data eye. A lookup table is used to determine a PI code or a DLL propagation delay code corresponding to a voltage droop level.