公开(公告)号：US20100244920A1

公开(公告)日：2010-09-30

申请号：US12491567

申请日：2009-06-25

Applicant: Seung-Joon Ahn ,  Jong-Chern Lee

Inventor： Seung-Joon Ahn ,  Jong-Chern Lee

IPC: H03H11/26

CPC classification number: H03H11/26

Abstract: A delay circuit includes first and second selective delay stages each including a number of unit delay cells to delay signals applied thereto; and a delay control unit configured to control selectively applying an input signal to the first selective delay stage or the second selective delay stage in response to a code combination of first and second selection signals and produce an output signal.

Abstract translation: 延迟电路包括第一和第二选择性延迟级，每个延迟阶段包括多个单位延迟单元以延迟施加到其上的信号; 以及延迟控制单元，被配置为响应于第一和第二选择信号的代码组合，选择性地将输入信号施加到第一选择延迟级或第二选择性延迟级，并产生输出信号。

公开(公告)号：US07733162B2

公开(公告)日：2010-06-08

申请号：US12327729

申请日：2008-12-03

Applicant: Jong-Sam Kim ,  Jong-Chern Lee

Inventor： Jong-Sam Kim ,  Jong-Chern Lee

IPC: G05F3/02

CPC classification number: G11C11/4085 ,  G11C5/145 ,  G11C11/4074 ,  H02M3/073 ,  H02M2003/077

Abstract: A pumping voltage generating circuit of a semiconductor memory apparatus, the pumping voltage generating circuit includes a detecting unit configured to compare a level of a pumping voltage with a level of a reference voltage to generate a detection signal, an oscillating signal generator configured to sequentially generate a first oscillating signal and a second oscillating signal in response to the detection signal, and to elevate frequencies of the first and second oscillating signals when the second oscillating signal is generated, a first pump configured to perform a pumping operation in response to the first oscillating signal, and a second pump configured to perform a pumping operation in response to the second oscillating signal, wherein output terminals of the first pump and the second pump are commonly connected, and the pumping voltage is output at the output terminals of the first pump and the second pump.

Abstract translation: 一种半导体存储装置的泵浦电压产生电路，所述泵送电压产生电路包括：检测单元，被配置为将泵浦电压的电平与参考电压的电平进行比较以产生检测信号;振荡信号发生器，被配置为顺序地产生 响应于所述检测信号的第一振荡信号和第二振荡信号，并且当产生所述第二振荡信号时提升所述第一和第二振荡信号的频率;第一泵，被配置为响应于所述第一振荡 信号，以及第二泵，被配置为响应于所述第二振荡信号执行泵送操作，其中所述第一泵和所述第二泵的输出端子共同连接，并且所述泵浦电压在所述第一泵的输出端子处输出， 第二个泵。

公开(公告)号：US07492646B2

公开(公告)日：2009-02-17

申请号：US11717662

申请日：2007-03-14

Applicant: Jong-Chern Lee ,  Sun-Hye Shin

Inventor： Jong-Chern Lee ,  Sun-Hye Shin

IPC: G11C5/14

CPC classification number: G05F1/465

Abstract: An internal voltage generator of a semiconductor memory device is capable of changing driving abilities between standby and active modes, to respond faster in the active mode and prevent a leakage current in the standby mode. The internal voltage generator of a semiconductor memory device comprises a driving controller for generating drive control signals having information about standby and active modes, a first voltage generator enabled by the drive control signals for comparing an internal voltage with a reference voltage in the standby and active modes, a first driver for generating the internal voltage according to a comparison performed by the first voltage generator, a second voltage generator enabled by the drive control signal for comparing the internal voltage with the reference voltage in the active mode, and a second driver for generating the internal voltage according to a comparison performed by the second voltage generator.

Abstract translation: 半导体存储器件的内部电压发生器能够改变待机模式和有源模式之间的驱动能力，以便在待机模式下更快地响应并防止在待机模式下的漏电流。 半导体存储器件的内部电压发生器包括用于产生具有关于待机和有功模式的信息的驱动控制信号的驱动控制器，通过用于将内部电压与待机和有效模式下的参考电压进行比较的驱动控制信号使能的第一电压发生器 模式，用于根据由第一电压发生器进行的比较产生内部电压的第一驱动器，通过用于将内部电压与活动模式中的参考电压进行比较的驱动控制信号使能的第二电压发生器和用于 根据由第二电压发生器执行的比较产生内部电压。

公开(公告)号：US07339397B2

公开(公告)日：2008-03-04

申请号：US11176345

申请日：2005-07-08

Applicant: Jong-Chern Lee

Inventor： Jong-Chern Lee

IPC: H03K19/003

CPC classification number: G11C7/1069 ,  G11C7/1051

Abstract: A data output apparatus and method in a global input and output (GIO) line transmits data via the GIO line. This data output apparatus includes a read driver driven responsive to an input of read data for inverting and amplifying the data to output inverted and amplified data onto the GIO line, a GIO termination unit driven responsive to a termination signal for rising or falling a voltage level on the GIO line by a preset level, prior to driving the data onto the GIO line by the read driver, and a receiver driven responsive to the read data transmitted through the GIO line for inverting and amplifying the read data to provide inverted and amplified data. This data output apparatus can enable a high rate data transmission by decreasing a swing width of data transmitted via the GIO line and also reduce a coupling noise on adjacent lines.

Abstract translation: 全局输入和输出（GIO）线中的数据输出装置和方法经由GIO线传送数据。 该数据输出装置包括读取驱动器，该读取驱动器响应于用于反相和放大数据的读取数据的输入，以将反相和放大的数据输出到GIO线上;响应终止信号驱动的GIO终端单元，用于上升或下降电压电平 在读取驱动器将数据驱动到GIO线之前，将GIO线上的GIO线和响应于通过GIO线传输的读取数据驱动的接收器进行反相和放大，以提供反相和放大数据 。 该数据输出装置可以通过减小通过GIO线传输的数据的摆幅来实现高速率数据传输，并且还减少相邻线路上的耦合噪声。

公开(公告)号：US07317338B2

公开(公告)日：2008-01-08

申请号：US11182230

申请日：2005-07-15

Applicant: Jong-Chern Lee

Inventor： Jong-Chern Lee

IPC: H03K19/0175 ,  H03K19/094

CPC classification number: H03K19/018585 ,  H03K19/0016

Abstract: The present invention provides an input buffer for use in a semiconductor device reducing a current consumption and maintaining a reliable operation speed by detecting a level of the reference voltage. The input buffer includes a comparator, having a first biasing device controlled by a buffer enable signal, for sensing a logic level of an input data by comparing voltage levels of a reference voltage and the input data, a reference voltage detector for detecting the level of the reference voltage, and a second biasing device controlled by an output signal from the reference voltage detector and parallel connected to the first biasing device.

Abstract translation: 本发明提供一种用于半导体器件的输入缓冲器，通过检测参考电压的电平来减少电流消耗并保持可靠的运行速度。 输入缓冲器包括比较器，具有由缓冲器使能信号控制的第一偏置装置，用于通过比较参考电压和输入数据的电压电平来感测输入数据的逻辑电平;参考电压检测器，用于检测 参考电压和由来自参考电压检测器的输出信号控制并且并联连接到第一偏置装置的第二偏置装置。

公开(公告)号：US20060208762A1

公开(公告)日：2006-09-21

申请号：US11182230

申请日：2005-07-15

Applicant: Jong-Chern Lee

Inventor： Jong-Chern Lee

IPC: H03K19/094

CPC classification number: H03K19/018585 ,  H03K19/0016

Abstract: The present invention provides an input buffer for use in a semiconductor device reducing a current consumption and maintaining a reliable operation speed by detecting a level of the reference voltage. The input buffer includes a comparator, having a first biasing device controlled by a buffer enable signal, for sensing a logic level of an input data by comparing voltage levels of a reference voltage and the input data, a reference voltage detector for detecting the level of the reference voltage, and a second biasing device controlled by an output signal from the reference voltage detector and parallel connected to the first biasing device.

Abstract translation: 本发明提供一种用于半导体器件的输入缓冲器，通过检测参考电压的电平来减少电流消耗并保持可靠的运行速度。 输入缓冲器包括比较器，具有由缓冲器使能信号控制的第一偏置装置，用于通过比较参考电压和输入数据的电压电平来感测输入数据的逻辑电平;参考电压检测器，用于检测 参考电压和由来自参考电压检测器的输出信号控制并且并联连接到第一偏置装置的第二偏置装置。

公开(公告)号：US20050093530A1

公开(公告)日：2005-05-05

申请号：US10878568

申请日：2004-06-29

Applicant: Jong-Chern Lee

Inventor： Jong-Chern Lee

IPC: G11C5/14 ,  G05F3/16 ,  G05F3/24

CPC classification number: G05F3/245 ,  Y10S323/907

Abstract: There is provided a reference voltage generator that generates a constant reference voltage regardless of a change in temperature. The reference voltage generator includes a temperature-compensated current generating part for reducing a supply current provided to an output terminal in response to an increase of temperature, and a diode for receiving the supply current through the output terminal.

Abstract translation: 提供了参考电压发生器，其产生恒定的参考电压，而与温度的变化无关。 参考电压发生器包括温度补偿电流产生部件，用于响应于温度升高而减小提供给输出端子的电源电流;以及二极管，用于接收通过输出端子的电源电流。