公开(公告)号：US20060271609A1

公开(公告)日：2006-11-30

申请号：US11135465

申请日：2005-05-24

申请人： Hiroyuki Takahashi ,  Yoshiyuki Katoh ,  Masatoshi Sonoda

发明人： Hiroyuki Takahashi ,  Yoshiyuki Katoh ,  Masatoshi Sonoda

IPC分类号： G06F15/00

CPC分类号： G11C11/4096 ,  G11C7/1006 ,  G11C2207/108

摘要： In a semiconductor apparatus for a multi-bit input/output function, a semiconductor memory chip includes 3m rows, 3m columns (m=1, 2, . . . ) of memory banks, each having a plurality of input/output terminals. The memory banks are adapted to carry out the same operation so that a predetermined number of bits are accessed from the input/output terminals of each of the memory banks.

摘要翻译： 在用于多位输入/输出功能的半导体装置中，半导体存储器芯片包括3行，3列（m = 1,2，...， ），每个存储体具有多个输入/输出端子。 存储器组适于执行相同的操作，使得从每个存储体的输入/输出端子访问预定数量的位。

公开(公告)号：US20060135304A1

公开(公告)日：2006-06-22

申请号：US11264317

申请日：2005-11-01

申请人： Masatoshi Sonoda

发明人： Masatoshi Sonoda

IPC分类号： F16H55/30 ,  F16H7/06

CPC分类号： F16H55/08 ,  F16H55/30 ,  F16H57/0006 ,  F16H2055/086

摘要： In a sprocket for a chain transmission, teeth are disposed around the circumference of the sprocket at intervals. Arc-shaped tooth gap bottoms are formed between adjacent teeth, and each tooth gap bottom is continuous with the facing tooth surfaces of its adjacent teeth. Each tooth is formed so that its thickness is greater than the thickness of an ISO tooth form and gradually becomes thinner from the pitch line toward the tooth head. At engagement of the chain with the sprocket, a roller first comes into contact with a back tooth surface so that polygonal movement is suppressed.

公开(公告)号：US20060122018A1

公开(公告)日：2006-06-08

申请号：US11269002

申请日：2005-11-08

申请人： Aizoh Kubo ,  Hiroki Ishida ,  Masatoshi Sonoda

发明人： Aizoh Kubo ,  Hiroki Ishida ,  Masatoshi Sonoda

IPC分类号： F16H7/06 ,  F16H55/30 ,  F16G13/02

CPC分类号： F16H55/30 ,  F16H7/06 ,  F16H55/08

摘要： In a chain transmission in which a roller chain transmits power from a driving sprocket to one or more driven sprockets, the sprocket teeth are shaped so that at a location radially outward from the sprocket pitch circle, the distance between the front surface of each sprocket tooth to a radial reference line from the sprocket center through the center of the tooth root, is at least as great as the distance from the centerline to the front tooth surface at the pitch circle. The tooth faces merge smoothly with the tooth gap bottom, the sprocket root diameter is smaller than the root diameter according to ISO standards, and the radius of the arcuate tooth gap bottom is greater than the radius of the chain roller.

公开(公告)号：US06856566B2

公开(公告)日：2005-02-15

申请号：US10343806

申请日：2001-08-03

申请人： Hiroyuki Takahashi ,  Masatoshi Sonoda ,  Atsushi Nakagawa

发明人： Hiroyuki Takahashi ,  Masatoshi Sonoda ,  Atsushi Nakagawa

IPC分类号： G11C5/00 ,  G11C7/22 ,  G11C8/18 ,  G11C11/406 ,  G11C11/4074 ,  G11C11/4076 ,  H03K3/011 ,  H03K3/03 ,  G11C7/00

CPC分类号： H03K3/0315 ,  G11C7/04 ,  G11C7/22 ,  G11C7/222 ,  G11C8/18 ,  G11C11/406 ,  G11C11/40626 ,  G11C11/4074 ,  G11C11/4076 ,  H03K3/011

摘要： It is an object to provide a timer circuit which exhibits a tendency of decreasing a timer cycle upon a temperature increase and another tendency of increasing the timer cycle upon a temperature decrease. A diode D has a current characteristic depending upon temperature. A forward current flows through an n-type MOS transistor N1 which forms a primary side of a current mirror. Another current flowing through a p-type MOS transistor P2 and an n-type MOS transistor N3 which form a secondary side of the current mirror is defined depending upon the current flowing through the n-type MOS transistor N1. The current flowing through the p-type MOS transistor P2 and the n-type MOS transistor N3 is supplied as an operating current of a ring oscillator comprising inverters I1˜I3. Accordingly, a cycle (timer cycle) of a clock signal CLK outputted from this ring oscillator reflects a temperature characteristic of the diode D, wherein the timer cycle is decreased with increasing the temperature.

摘要翻译： 本发明的目的是提供一种定时器电路，其在温度升高时呈现减小定时器周期的趋势，以及在温度降低时增加定时器周期的另一趋势。 二极管D具有取决于温度的电流特性。 正向电流流过形成电流镜的初级侧的n型MOS晶体管N1。 形成电流镜的二次侧的p型MOS晶体管P2和n型MOS晶体管N3的另一个电流根据流经n型MOS晶体管N1的电流而定义。 流过p型MOS晶体管P2和n型MOS晶体管N3的电流作为包括反相器I1〜I3的环形振荡器的工作电流提供。 因此，从该环形振荡器输出的时钟信号CLK的周期（定时器周期）反映二极管D的温度特性，其中定时器周期随着温度的升高而降低。

公开(公告)号：US06366503B2

公开(公告)日：2002-04-02

申请号：US09741635

申请日：2000-12-19

申请人： Masatoshi Sonoda

发明人： Masatoshi Sonoda

IPC分类号： G11C1604

CPC分类号： G11C7/06 ,  G11C7/1006

摘要： A semiconductor storage device that can be selectable between input/output (I/O) configuration and have reduced area for data buses and/or reduced number of circuit elements is disclosed. According to one embodiment, a semiconductor storage device may include first and second memory cell arrays (10 and 12). Eighteen first sense amplifiers (SA(L)1-18) can be connected to the first memory cell array (10) and eighteen second sense amplifiers (SA(R)1-18) can be connected to the second memory cell array (12). In addition, eighteen first I/O circuits (I/O(L)1-18) may correspond to the first sense amplifiers (SA(L)1-18) and eighteen second I/O circuits (I/O(R)1-18) may correspond to the second amplifiers (SA(R)1-18). Eighteen data buses (DB1-DB18) can be situated between the sense amplifiers (SA(L)1-18 and SA(R)1-18) and I/O circuits (I/O(L)1-18 and I/OR)1-18). Each data bus may be separated into at least two different portions by a disconnecting device (T1-T18). In one I/O configuration (e.g., x36), disconnecting devices (T1-T18) separate the data buses (DB1-DB18) into two different portions, in another I/O configuration (e.g., x18) the data buses (DB1-DB18) are not separated into different portions.

摘要翻译： 公开了可以在输入/输出（I / O）配置之间选择并具有减小的数据总线面积和/或减少电路元件数量的半导体存储设备。 根据一个实施例，半导体存储设备可以包括第一和第二存储单元阵列（10和12）。 可将18个第一读出放大器（SA（L）1-18）连接到第一存储单元阵列（10），并将十八个第二读出放大器（SA（R）1-18）连接到第二存储单元阵列 ）。 另外，十八个第一I / O电路（I / O（L）1-18）可以对应于第一读出放大器（SA（L）1-18）和十八个第二I / O电路（I / O 1-18）可以对应于第二放大器（SA（R）1-18）。 18个数据总线（DB1-DB18）可位于读出放大器（SA（L）1-18和SA（R）1-18）和I / O电路（I / O（L）1-18和I / OR）1-18）。 每个数据总线可以通过断开装置（T1-T18）分成至少两个不同的部分。 在一个I / O配置（例如x36）中，断开设备（T1-T18）将数据总线（DB1-DB18）分为两个不同的部分，在另一个I / O配置（例如x18）中，数据总线（DB1- DB18）不分成不同的部分。