Abstract:
A sensing faucet for the integration of soap supply with water exit includes a main body configured with a mounting portion having a first mounting zone and second mounting zone, where the first mounting zone is used to accept a water supply module, and the second mounting zone a soap supply module, where an obtuse angle is formed between the first and second mounting zones. With the above structure, the soap supply module can conform to a human factor design besides the water and soap supply modules are integrated with each other in the same sensing faucet, allowing users direct soap supply according hand washing habits without needing to touch any other components, and the hand cleaning convenience can then be achieved.
Abstract:
An activation device for an electronic faucet comprises a body, a shell, and a battery. It is further characterized in that a wireless transmission module is arranged at the shell and electrically connected with the battery pack. The wireless transmission module has an activation switch which has a timer to be set to turn on/off the wireless transmission module. Therefore, the wireless transmission module may be not continuously operated so as to effectively reduce the power loss.
Abstract:
A foamed soap dispensing structure comprises a container, a cover set, a faucet, and a foaming unit. The foaming unit has a foaming member and an outer ring. The foaming member has two inlets and a foam material. The outer ring has an assembling end corresponding to a connection end of a soap providing portion of the faucet. When the foaming unit is clogged, the foaming unit may be pulled out by an user so that the assembling end may be separated from the connection end of the soap providing portion to easily replace the foaming member and then to achieve the effect of easy construction.
Abstract:
A system includes a driving device operating at first supply voltage Vdd1 and having a CMOS output. A driven devise operates at a second supply voltage Vdd2 lower than the first supply voltage Vdd1, and has a CMOS input with an NMOS pull-down transistor. A protection circuit includes a first resistor coupled to the CMOS output of the driving device and a gate of the NMOS pull-down transistor. A parasitic NPN bipolar junction transistor has a drain connected to the gate of the NMOS pull-down transistor sad a source coupled to a lower-voltage supply rail VSS. A second resistor connects a gate of the parasitic NPN bipolar junction transistor to Vss. The second resistor has a resistance sized for controlling a trigger voltage of the parasitic NPN bipolar junction transistor for protecting a gate oxide layer of the NMOS pull-down transistor from an electrostatic discharge.
Abstract:
An apparatus and method for testing conductive bumps are provided. An exemplary embodiment of a bump testing unit comprises a support substrate with two probes protruding one surface thereof. A digital detecting device is embedded in the support substrate, comprising a first and second input terminals and an output terminal, wherein the input terminals electrically connects one of the probes.
Abstract:
A test device for detecting current leakage between deep trench capacitors in DRAM devices. The test device is disposed in a scribe line region of a wafer. In the test device, a first trench capacitor pair has a first deep trench capacitor and a second deep trench capacitor connected in parallel. A first transistor has a first terminal electrically coupled to the first deep trench capacitor and a control terminal electrically coupled to a first word line. A second transistor has a first terminal electrically coupled to the second deep trench capacitor and a control terminal electrically coupled to a second word line. First and second bit lines are electrically coupled to the first and second transistors respectively. The first and second bit lines are separated and the first and second word lines are perpendicular to the bit line regions.
Abstract:
A method for refreshing a memory capacitor is provided. First, the refresh controller provides a refresh control signal. The pre-decoded row address counter counts and outputs a regular pre-decoded row address in response to the refresh control signal. The regular pre-decoded row address is inputted to the pre-decoded row address re-driver to obtain a row address. The memory capacitor in response to the row address is refreshed.