TIMEBASE PERIPHERAL
    42.
    发明申请
    TIMEBASE PERIPHERAL 有权
    时间外围

    公开(公告)号:US20130195124A1

    公开(公告)日:2013-08-01

    申请号:US13753399

    申请日:2013-01-29

    CPC classification number: H04J3/06 G06F1/04

    Abstract: A microcontroller has a timebase driven by a clock signal, wherein the timebase has a reset input and an output coupled with a comparator. The comparator is further coupled with a register and is operable to generate a synchronization output signal if the timebase matches the register value. The microcontroller further has a first multiplexer receiving the synchronization output signal from the comparator and further receiving at least one event signal generated by a unit other than the timebase, wherein the first multiplexer is operable to select either the synchronization output signal or the at least one event signal as a timebase synchronization output signal.

    Abstract translation: 微控制器具有由时钟信号驱动的时基,其中时基具有复位输入和与比较器耦合的输出。 比较器还与寄存器耦合,如果时基匹配寄存器值,则可操作以产生同步输出信号。 微控制器还具有接收来自比较器的同步输出信号的第一多路复用器,并且还接收由除时基之外的单元产生的至少一个事件信号,其中第一多路复用器可操作以选择同步输出信号或至少一个 事件信号作为时基同步输出信号。

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