公开(公告)号：US11363299B2

公开(公告)日：2022-06-14

申请号：US17116137

申请日：2020-12-09

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Che Wei Kuo ,  Chong Soon Lim ,  Chu Tong Wang ,  Han Boon Teo ,  Hai Wei Sun ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/66 ,  H04N19/122 ,  H04N19/176 ,  H04N19/103 ,  H04N19/96

Abstract: An encoder includes circuitry and memory connected to the circuitry, and the circuitry, in operation: determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The circuitry determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.

公开(公告)号：US11206402B2

公开(公告)日：2021-12-21

申请号：US17125113

申请日：2020-12-17

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/13 ,  H04N19/70 ,  H04N19/176 ,  H04L29/06 ,  H04N19/184

Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.

公开(公告)号：US20250142098A1

公开(公告)日：2025-05-01

申请号：US19004707

申请日：2024-12-30

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/423 ,  H04N19/159 ,  H04N19/176 ,  H04N19/82

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry determines one or more tiles included in a picture and one or more subpictures included in the picture, according to a constraint condition that each tile of the one or more tiles includes at least one subpicture of the one or more subpictures entirely and the each tile does not include another subpicture of the one or more subpictures partially.

公开(公告)号：US20250039421A1

公开(公告)日：2025-01-30

申请号：US18912975

申请日：2024-10-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takahiro NISHI ,  Tadamasa Toma ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/44 ,  H04N19/119 ,  H04N19/176 ,  H04N19/70

Abstract: According to one aspect of the present disclosure, a decoder includes memory and a processor coupled to the memory. The processor is configured to split a current picture into tiles, generate a slice having a rectangular shape and located at a lower-right corner of the current picture, the slice including at least a part of a tile among the tiles, generate first information on a region of the slice with header information, the header information not including information identical to the first information, and decode the slice with the first information.

公开(公告)号：US12192531B2

公开(公告)日：2025-01-07

申请号：US18479663

申请日：2023-10-02

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya Li ,  Han Boon Teo ,  Chong Soon Lim ,  Hai Wei Sun ,  Che-Wei Kuo ,  Chu Tong Wang ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/82 ,  H04N19/107 ,  H04N19/176 ,  H04N19/186

Abstract: A decoder includes memory and a processor coupled to the memory and configured to: generate a first coefficient value by applying a CCALF (cross component adaptive loop filtering) process to a first reconstructed image sample of a luma component; clip the first coefficient value such that the clipped first coefficient value is within a first range from −27 to 27−1; generate a second coefficient value by applying an ALF (adaptive loop filtering) process to a second reconstructed image sample of a chroma component; clip the second coefficient value such that the clipped second coefficient value is within a second range different from the first range; generate a third coefficient value by adding the clipped first coefficient value to the clipped second coefficient value; and generate a third reconstructed image sample of the chroma component using the third coefficient value.

公开(公告)号：US12160614B2

公开(公告)日：2024-12-03

申请号：US17750950

申请日：2022-05-23

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/70

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: encodes a video using (i) a decoding parameter set (DPS) which is identified based on presence of the DPS in a bitstream and (ii) a sequence parameter set (SPS) which is identified based on an identifier for the SPS.

公开(公告)号：US12075070B2

公开(公告)日：2024-08-27

申请号：US17681105

申请日：2022-02-25

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/30 ,  H04N19/103 ,  H04N19/157 ,  H04N19/169 ,  H04N19/70

CPC classification number: H04N19/30 ,  H04N19/103 ,  H04N19/157 ,  H04N19/188 ,  H04N19/70

Abstract: An encoder includes: memory; and circuitry coupled to the memory and configured to generate an encoded bitstream. In the encoder, when a multi-layer structure is to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream (i) a sequence parameter set that refers to a video parameter set and (ii) a network abstraction layer (NAL) unit having a layer identification (ID) greater than zero in the multi-layer structure, and when the multi-layer structure is not to be included in the encoded bitstream to be generated, the circuitry generates the encoded bitstream by including in the encoded bitstream a sequence parameter set that does not refer to the video parameter set.

公开(公告)号：US12063358B2

公开(公告)日：2024-08-13

申请号：US18196763

申请日：2023-05-12

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/105 ,  H04N19/176 ,  H04N19/182

CPC classification number: H04N19/105 ,  H04N19/176 ,  H04N19/182

Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry, in operation: derives, as a first parameter, a total sum of absolute values of sums of horizontal gradient values respectively for pairs of relative pixel positions; derives, as a second parameter, a total sum of absolute values of sums of vertical gradient values respectively for the pairs of relative pixel positions; derives, as a third parameter, a total sum of horizontal-related pixel difference values respectively for the pairs of relative pixel positions; derives, as a fourth parameter, a total sum of vertical-related pixel difference values respectively for the pairs of relative pixel positions; derives, as a fifth parameter, a total sum of vertical-related sums of horizontal gradient values respectively for the pairs of relative pixel positions; and generates a prediction image to be used to encode the current block using the first, second, third, fourth, and fifth parameters.

公开(公告)号：US12015764B2

公开(公告)日：2024-06-18

申请号：US17585833

申请日：2022-01-27

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Takahiro Nishi ,  Tadamasa Toma ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/105 ,  H04N19/172 ,  H04N19/174 ,  H04N19/46

CPC classification number: H04N19/105 ,  H04N19/172 ,  H04N19/174 ,  H04N19/46

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry encodes, into a sequence parameter set, a first parameter indicating that a change in a picture size is allowed for any of pictures, determines whether or not a reference picture having a same size as a current picture is available to encode the current picture, and disables temporal motion vector prediction when it is determined that the reference picture having the same size as the current picture is not available.

公开(公告)号：US11936886B2

公开(公告)日：2024-03-19

申请号：US17547608

申请日：2021-12-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/196 ,  H04N19/31 ,  H04N19/46 ,  H04N19/70

CPC classification number: H04N19/196 ,  H04N19/31 ,  H04N19/46 ,  H04N19/70

Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry, for each of temporal sub-layers for temporal scalability different from spatial scalability, stores first parameters into buffering period supplemental enhancement information (SEI) and encodes the first parameters. The first parameters present initial delays in timing to extract data from a coded picture buffer (CPB). The circuitry stores a second parameter into the buffering period SEI and encodes the second parameter. The second parameter indicates a total number of the temporal sub-layers. A value of the second parameter is equal to a value of a third parameter that is encoded into a sequence parameter set and indicates a total number of the temporal sub-layers.