公开(公告)号：US20220279180A1

公开(公告)日：2022-09-01

申请号：US17725113

申请日：2022-04-20

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/119 ,  H04N19/176

Abstract: Provided is an encoder which includes circuitry and memory. The circuitry encodes an image block using the memory. In encoding the image block, the circuitry: obtains one or more size parameters related to a size of the image block; determines whether the one or more size parameters and one or more thresholds satisfy a determined relationship; encodes a split parameter when the one or more size parameters and the one or more thresholds are determined to satisfy the determined relationship, the split parameter indicating whether the image block is to be split into a plurality of partitions including a non-rectangular partition; and encodes the image block after splitting the image block into the plurality of partitions when the split parameter indicates that the image block is to be split into the plurality of partitions.

公开(公告)号：US20220256149A1

公开(公告)日：2022-08-11

申请号：US17726133

申请日：2022-04-21

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/119 ,  H04N19/52 ,  H04N19/176 ,  H04N19/137

Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.

公开(公告)号：US20220150488A1

公开(公告)日：2022-05-12

申请号：US17580344

申请日：2022-01-20

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon LIM ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Ru Ling LIAO ,  Takahiro NISHI ,  Tadamasa TOMA

IPC: H04N19/119 ,  H04N19/176 ,  H04N19/50 ,  H04N19/60

Abstract: An encoder according to one aspect of the present disclosure encodes a block of an image, and includes a processor and memory connected to the processor. Using the memory, the processor partitions a block into a plurality of sub blocks and encodes a sub block included in the plurality of sub blocks in an encoding process including at least a transform process or a prediction process. The block is partitioned using a multiple partition including at least three odd-numbered child nodes and each of a width and a height of each of the plurality of sub blocks is a power of two.

公开(公告)号：US20220094949A1

公开(公告)日：2022-03-24

申请号：US17539348

申请日：2021-12-01

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/176 ,  H04N19/105 ,  H04N19/52 ,  H04N19/70

Abstract: An encoder, includes: circuitry; and memory. Using the memory, the circuitry: in inter prediction for a current block, determines a base motion vector, and writes, in an encoded signal, a delta motion vector representing (i) one direction among a plurality of directions including a diagonal direction and (ii) a distance from the base motion vector; and encodes the current block using the delta motion vector and the base motion vector as a motion vector of the current block.

公开(公告)号：US20210385474A1

公开(公告)日：2021-12-09

申请号：US17408315

申请日：2021-08-20

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon LIM ,  Sughosh Pavan SHASHIDHAR ,  Ru Ling LIAO ,  Hai Wei SUN ,  Han Boon TEO ,  Jing Ya LI ,  Kiyofumi ABE ,  Tadamasa TOMA ,  Takahiro NISHI

IPC: H04N19/44 ,  H04N19/119 ,  H04N19/137 ,  H04N19/159 ,  H04N19/176

Abstract: An image decoder has circuitry coupled to a memory. The circuitry splits a current image block into a plurality of partitions. The circuitry predicts a first motion vector from a set of uni-prediction motion vector candidates for a first partition of the plurality of partitions, and decodes the first partition using the first motion vector.

公开(公告)号：US20210344958A1

公开(公告)日：2021-11-04

申请号：US17373106

申请日：2021-07-12

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon LIM ,  Han Boon TEO ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ru Ling LIAO ,  Sughosh Pavan SHASHIDHAR ,  Hai Wei SUN

IPC: H04N19/597 ,  H04N19/159 ,  H04N19/176 ,  G06T5/00 ,  H04N19/46 ,  H04N19/85

Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.

公开(公告)号：US20210243469A1

公开(公告)日：2021-08-05

申请号：US17230725

申请日：2021-04-14

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Jing Ya LI ,  Chong Soon LIM ,  Sughosh Pavan SHASHIDHAR ,  Ru Ling LIAO ,  Hai Wei SUN ,  Han Boon TEO ,  Kiyofumi ABE ,  Tadamasa TOMA ,  Takahiro NISHI

IPC: H04N19/513 ,  H04N19/119 ,  H04N19/176 ,  H04N19/96

Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry corrects a base motion vector using a correction value in a fixed direction; and encodes a current partition by using the corrected base motion vector corrected. The correction value is specified by an index indicating one of correction values included in a table. The table is selected from among a plurality of tables, wherein the correction values in one of the plurality of tables have different increments from the correction values in another one of the plurality of tables.

公开(公告)号：US20210136402A1

公开(公告)日：2021-05-06

申请号：US17087904

申请日：2020-11-03

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon LIM ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Ru Ling LIAO ,  Jing Ya LI ,  Tadamasa TOMA ,  Takahiro NISHI ,  Kiyofumi ABE ,  Ryuichi KANOH

IPC: H04N19/52

Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.

公开(公告)号：US20210058636A1

公开(公告)日：2021-02-25

申请号：US17094206

申请日：2020-11-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi ABE ,  Takahiro NISHI ,  Tadamasa TOMA ,  Ryuichi KANOH ,  Chong Soon LIM ,  Ru Ling LIAO ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Han Boon TEO ,  Jing Ya LI

IPC: H04N19/44 ,  H04N19/137 ,  H04N19/176 ,  H04N19/182

Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.

公开(公告)号：US20200036992A1

公开(公告)日：2020-01-30

申请号：US16587961

申请日：2019-09-30

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon LIM ,  Hai Wei SUN ,  Sughosh Pavan SHASHIDHAR ,  Ru Ling LIAO ,  Han Boon TEO ,  Takahiro NISHI ,  Ryuichi KANOH ,  Tadamasa TOMA

IPC: H04N19/44 ,  H04N19/119 ,  H04N19/13 ,  H04N19/124 ,  H04N19/159 ,  H04N19/176

Abstract: An image decoder splits a block of a picture into a plurality of sub blocks in a first direction using a first partition mode; and decodes the plurality of sub blocks, wherein, when the block is sized N pixels by 2N pixels and the first direction is along the 2N pixels, N being an integer, the first partition mode includes splitting the block into the plurality of sub blocks including at least one sub block sized N/4 pixels by 2N pixels, and excludes splitting the block into two sub blocks sized N/2 pixels by 2N pixels.