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公开(公告)号:US11539952B2
公开(公告)日:2022-12-27
申请号:US16815920
申请日:2020-03-11
Applicant: QUALCOMM Incorporated
Inventor: Hilmi Enes Egilmez , Amir Said , Vadim Seregin , Marta Karczewicz
IPC: H04N19/122 , H04N19/593 , H04N19/176 , H04N19/61
Abstract: An example method includes inferring, for a current transform block of a current video block, a transform type from a plurality of transform types that includes one or more discrete cosine transforms (DCTs) and one or more discrete sine transforms (DSTs), wherein inferring the transform type comprises: determining a size of the current transform block; determining whether the current video block is partitioned using intra-subblock partitioning (ISP); and responsive to determining that the size of the current transform block is less than a threshold and that the current video block is partitioned using ISP, selecting a particular DST of the one or more DSTs as the selected transform type; transforming, using the selected transform type, the current transform block to obtain a block of reconstructed residual data for the video block; and reconstructing, based on the reconstructed residual data for the video block, the video block.
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公开(公告)号:US11533491B2
公开(公告)日:2022-12-20
申请号:US16948008
申请日:2020-08-27
Applicant: QUALCOMM Incorporated
Inventor: Nan Hu , Vadim Seregin , Marta Karczewicz
IPC: H04N19/14 , H04N19/117 , H04N19/105 , H04N19/176 , H04N19/169
Abstract: An example device for coding video data includes a memory configured to store a block of video data and one or more processors, implemented in circuitry, and communicatively coupled to the memory. The one or more processors are configured to determine whether a transform and quantization are applied to the block of the video data and based on the transform and quantization not being applied to the block of video data, code the block of video data without applying bilateral filtering (BIF) or Hadamard transform domain filtering (HTDF).
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公开(公告)号:US11496771B2
公开(公告)日:2022-11-08
申请号:US17181876
申请日:2021-02-22
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin , Muhammed Zeyd Coban
IPC: H04N19/70 , H04N19/105 , H04N19/174 , H04N19/46 , H04N19/176 , H04N19/503
Abstract: A video decoder may be configured to receive, in response to receiving a first syntax element indicating that reference picture list information is included in a picture header syntax structure, a second syntax element in the picture header syntax structure indicating whether a collocated picture used for temporal motion vector prediction is to be derived from a first reference picture list or a second reference picture list; receive a slice of the video data that refers to the picture header syntax structure; and in response to the slice being a P slice, set a value for a third syntax element associated with the slice to a first value for the third syntax element, with the first value for the third syntax element indicating that the collocated picture used for temporal motion vector prediction is to be derived from the first reference picture list.
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公开(公告)号:US20220329844A1
公开(公告)日:2022-10-13
申请号:US17809160
申请日:2022-06-27
Applicant: QUALCOMM Incorporated
Inventor: Luong Pham Van , Wei-Jung Chien , Vadim Seregin , Marta Karczewicz , Han Huang
IPC: H04N19/52 , H04N19/15 , H04N19/615 , H04N19/513
Abstract: An example device for coding video data includes a memory configured to store video data; and one or more processing units implemented in circuitry and configured to: store motion information for a first coding tree unit (CTU) line of a picture in a first history motion vector predictor (MVP) buffer of the memory; reset a second history MVP buffer of the memory; and after resetting the second history MVP buffer, store motion information for a second CTU line of the picture in the second history MVP buffer, the second CTU line being different than the first CTU line. Separate threads of a video coding process executed by the one or more processors may process respective CTU lines, in some examples.
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公开(公告)号:US11388441B2
公开(公告)日:2022-07-12
申请号:US14657617
申请日:2015-03-13
Applicant: QUALCOMM Incorporated
Inventor: Fnu Hendry , Adarsh Krishnan Ramasubramonian , Ye-Kui Wang , Vadim Seregin
IPC: H04N19/70 , H04N19/30 , H04N19/124 , H04N19/187 , H04N19/46 , H04N19/60 , H04N19/172 , H04N19/31 , H04N19/169
Abstract: According to certain aspects, an apparatus for coding video information includes a memory and a processor configured to determine whether a first syntax element is present in a bitstream, the first syntax element associated with a sequence parameter set (SPS) and a first flag indicative of whether a temporal identifier (ID) of a reference picture for pictures that refer to the SPS can be nested; and in response to determining that the first syntax element is not present in the bitstream: obtain a second syntax element indicative of a maximum number of temporal sub-layers in a particular layer of the plurality of layers; and determine whether to set the first flag equal to a second flag indicative of whether a temporal ID of a reference picture for any pictures can be nested based at least in part on a value of the second syntax element.
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公开(公告)号:US20220201322A1
公开(公告)日:2022-06-23
申请号:US17644519
申请日:2021-12-15
Applicant: QUALCOMM Incorporated
Inventor: Han Huang , Kevin Pascal Andre Reuze , Vadim Seregin , Marta Karczewicz
IPC: H04N19/44 , H04N19/176 , H04N19/159 , H04N19/137
Abstract: An example device for decoding video data includes one or more processors configured to: determine that a first weight and a second weight are specified for a bi-prediction mode predicted current block of video data; determine whether the current block is to be predicted using multi-hypothesis prediction (MHP) mode with the bi-prediction mode as a base mode; in response to determining that the current block is to be predicted using the MHP mode with the bi-prediction mode as the base mode, determine an additional inter-prediction mode of the MHP mode; generate a first prediction block according to the bi-prediction mode; generate a second prediction block according to the additional inter-prediction mode; generate a final prediction block for the current block according to the MHP mode using the first prediction block and the second prediction block; and decode the current block using the final prediction block.
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公开(公告)号:US20220201315A1
公开(公告)日:2022-06-23
申请号:US17556142
申请日:2021-12-20
Applicant: QUALCOMM Incorporated
Inventor: Zhi Zhang , Han Huang , Chun-Chi Chen , Yan Zhang , Vadim Seregin , Marta Karczewicz
IPC: H04N19/139 , H04N19/176 , H04N19/157 , H04N19/186 , H04N19/132 , H04N19/513
Abstract: Example devices and techniques for multi-pass decoder-side motion vector refinement (DMVR) are disclosed. An example device includes memory configured to store video data and one or more processors coupled to the memory. The one or more processors are configured to apply a multi-pass DMVR to a motion vector for a block of the video data to determine at least one refined motion vector and decode the block based on the at least one refined motion vector. The multi-pass DMVR includes a block-based first pass, a sub-block-based second pass, and a sub-block-based third pass.
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公开(公告)号:US11356685B2
公开(公告)日:2022-06-07
申请号:US17027262
申请日:2020-09-21
Applicant: QUALCOMM Incorporated
Inventor: Yao-Jen Chang , Muhammed Zeyd Coban , Vadim Seregin , Marta Karczewicz
IPC: H04N19/44 , H04N19/70 , H04N19/132 , H04N19/423 , H04N19/186 , H04N19/176
Abstract: A video decoder can be configured to decode a first syntax element indicating a size of a coding tree unit (CTU); after decoding the first syntax element indicating the size of the CTU, decode a second syntax element indicating a width of elements of a subpicture identifier grid; after decoding the first syntax element indicating the size of the CTU, decode a third syntax element indicating a height of the elements of the subpicture identifier grid; and determine a location of a subpicture within a picture based on the first syntax element, the second syntax element, and the third syntax element.
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公开(公告)号:US11330305B2
公开(公告)日:2022-05-10
申请号:US17182583
申请日:2021-02-23
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin , Muhammed Zeyd Coban
IPC: H04N19/70 , H04N19/174 , H04N19/159 , H04N19/46
Abstract: An example device includes memory configured to store video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine whether a picture of the video data is an intra random access picture (IRAP) and determine whether all layers of the picture are independent. Based on the picture being an IRAP and all layers of the picture being independent, the one or more processors are configured to determine a value of a first syntax element to be indicative of an inter slice not being allowed in the picture and code the picture without using inter slice prediction.
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公开(公告)号:US11323733B2
公开(公告)日:2022-05-03
申请号:US14719260
申请日:2015-05-21
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin , Rajan Laxman Joshi , Marta Karczewicz , Wei Pu , Joel Sole Rojals
IPC: H04N19/105 , H04N19/186 , H04N19/176 , H04N19/50 , H04N19/119 , H04N19/96 , H04N19/157
Abstract: In an example a method of processing video data includes determining a first palette for a first block of video data that is located in a first row of blocks, generating a predictor palette for constructing at least one second palette of at least one second block of video data in the first row of blocks coded, reinitializing the predictor palette for determining a third palette of a third block of video data that is located in a second row of blocks, wherein re-initializing the predictor palette comprises re-initializing the predictor palette based on the one or more palette entries of the first palette or an initial predictor palette generated after coding the first block, determining the third palette of the third block based on the re-initialized predictor palette, and coding the third block using the third palette.
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