公开(公告)号：US09876118B2

公开(公告)日：2018-01-23

申请号：US15450343

申请日：2017-03-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Shinpei Matsuda ,  Daisuke Matsubayashi

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786 ,  H01L29/24 ,  H01L29/04 ,  H01L29/49 ,  H01L29/66 ,  H01L27/12 ,  H01L27/32 ,  G02F1/1368

CPC classification number: H01L29/78648 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 μm or longer and 6.5 μm or shorter.

公开(公告)号：US09799775B2

公开(公告)日：2017-10-24

申请号：US15264667

申请日：2016-09-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki Kobayashi ,  Shinpei Matsuda ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/04 ,  H01L27/12 ,  H01L27/06

CPC classification number: H01L29/7869 ,  H01L27/0629 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/78696

Abstract: A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode, and a gate insulating layer. The second oxide semiconductor layer has a portion positioned between the first and third oxide semiconductor layers. The gate insulating layer has a region in contact with a top surface of the third oxide semiconductor layer. The gate electrode overlaps with a top surface of the portion with the gate insulating layer positioned therebetween. The gate electrode faces a side surface of the portion in a channel width direction with the gate insulating layer positioned therebetween. The second oxide semiconductor layer includes a region having a thickness greater than or equal to 2 nm and less than 8 nm. The length in the channel width direction of the second oxide semiconductor layer is less than 60 nm.

公开(公告)号：US09461179B2

公开(公告)日：2016-10-04

申请号：US14788940

申请日：2015-07-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki Kobayashi ,  Shinpei Matsuda ,  Shunpei Yamazaki

IPC: H01L29/786 ,  H01L29/36 ,  H01L27/06 ,  H01L29/04

CPC classification number: H01L29/7869 ,  H01L27/0629 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/78696

Abstract: A semiconductor device having stable electric characteristics is provided. The transistor includes first to third oxide semiconductor layers, a gate electrode, and a gate insulating layer. The second oxide semiconductor layer has a portion positioned between the first and third oxide semiconductor layers. The gate insulating layer has a region in contact with a top surface of the third oxide semiconductor layer. The gate electrode overlaps with a top surface of the portion with the gate insulating layer positioned therebetween. The gate electrode faces a side surface of the portion in a channel width direction with the gate insulating layer positioned therebetween. The second oxide semiconductor layer includes a region having a thickness greater than or equal to 2 nm and less than 8 nm. The length in the channel width direction of the second oxide semiconductor layer is less than 60 nm.

Abstract translation: 提供具有稳定电特性的半导体器件。 晶体管包括第一至第三氧化物半导体层，栅电极和栅极绝缘层。 第二氧化物半导体层具有位于第一和第三氧化物半导体层之间的部分。 栅极绝缘层具有与第三氧化物半导体层的顶表面接触的区域。 栅电极与栅绝缘层位于其间的部分的顶表面重叠。 栅极电极在栅极绝缘层位于沟槽宽度方向上面对该部分的侧面。 第二氧化物半导体层包括厚度大于或等于2nm且小于8nm的区域。 第二氧化物半导体层的沟道宽度方向的长度小于60nm。

公开(公告)号：US09437741B2

公开(公告)日：2016-09-06

申请号：US14272759

申请日：2014-05-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroyuki Miyake ,  Kenichi Okazaki ,  Masahiko Hayakawa ,  Shinpei Matsuda

IPC: H01L29/786 ,  H01L29/49 ,  H01L27/12

CPC classification number: H01L29/78606 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/4908 ,  H01L29/7869

Abstract: A semiconductor device including a transistor having excellent electrical characteristics is provided. Alternatively, a semiconductor device having a high aperture ratio and including a capacitor capable of increasing capacitance is provided. The semiconductor device includes a gate electrode, an oxide semiconductor film overlapping the gate electrode, an oxide insulating film in contact with the oxide semiconductor film, a first oxygen barrier film between the gate electrode and the oxide semiconductor film, and a second oxygen barrier film in contact with the first oxygen barrier film. The oxide semiconductor film and the oxide insulating film are provided on an inner side of the first oxygen barrier film and the second oxygen barrier film.

Abstract translation: 提供了包括具有优异电特性的晶体管的半导体器件。 或者，提供具有高开口率并且包括能够增加电容的电容器的半导体器件。 半导体器件包括栅电极，与栅电极重叠的氧化物半导体膜，与氧化物半导体膜接触的氧化物绝缘膜，栅电极和氧化物半导体膜之间的第一氧阻隔膜，以及第二氧阻隔膜 与第一氧阻隔膜接触。 氧化物半导体膜和氧化物绝缘膜设置在第一氧阻隔膜和第二氧阻隔膜的内侧。

公开(公告)号：US09306074B2

公开(公告)日：2016-04-05

申请号：US14293484

申请日：2014-06-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Shinpei Matsuda ,  Daisuke Matsubayashi

IPC: H01L29/10 ,  H01L29/12 ,  H01L29/786

CPC classification number: H01L29/78648 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: Provided is a semiconductor device including a transistor having excellent electrical characteristics (e.g., on-state current, field-effect mobility, or frequency characteristics) or a semiconductor device including a transistor with high reliability. In the channel width direction of a channel-etched transistor in which an oxide semiconductor film is between first and second gate electrodes, the first and second gate electrodes are connected to each other through an opening portion in first and second gate insulating films. In addition, the first and second gate electrodes surround the oxide semiconductor film in a cross-section in the channel width direction, with the first gate insulating film provided between the first gate electrode and the oxide semiconductor film and the second gate insulating film provided between the second gate electrode and the oxide semiconductor film. Furthermore, the channel length of the transistor is 0.5 μm or longer and 6.5 μm or shorter.

Abstract translation: 提供了包括具有优异的电特性（例如导通电流，场效应迁移率或频率特性）的晶体管或包括具有高可靠性的晶体管的半导体器件的半导体器件。 在其中氧化物半导体膜位于第一和第二栅电极之间的沟道蚀刻晶体管的沟道宽度方向上，第一和第二栅极通过第一和第二栅极绝缘膜中的开口部彼此连接。 此外，第一和第二栅电极在沟道宽度方向的横截面中包围氧化物半导体膜，第一栅极绝缘膜设置在第一栅极和氧化物半导体膜之间，第二栅极绝缘膜设置在第二栅极绝缘膜之间 第二栅电极和氧化物半导体膜。 此外，晶体管的沟道长度为0.5μm以上且6.5μm以下。