公开(公告)号：US4972432A

公开(公告)日：1990-11-20

申请号：US303214

申请日：1989-01-27

申请人： Gregory P. Wilson ,  Bryan A. Potratz ,  Thomas J. Walczak ,  Jeffery L. Mullins

发明人： Gregory P. Wilson ,  Bryan A. Potratz ,  Thomas J. Walczak ,  Jeffery L. Mullins

IPC分类号： H04B7/26 ,  B21C23/08 ,  B21J5/10 ,  B21J9/04 ,  H03K5/156 ,  H04B20060101 ,  H04B3/60 ,  H04B7/00 ,  H04L5/14 ,  H04L12/40

CPC分类号： H04L5/14

摘要： A multiplexed synchronous/asynchronous data bus is disclosed in which three bus lines are used to convey bidirectional synchronous data between at least two data devices at a relatively low data rate. Half duplex asynchronous data is applied at a higher data transfer rate to one of the three bus lines when another of the bus lines is held in a logic high state.

摘要翻译： 公开了一种复用的同步/异步数据总线，其中三条总线用于以相对低的数据速率在至少两个数据设备之间传送双向同步数据。 当另一个总线保持在逻辑高状态时，半双工异步数据以较高的数据传输速率应用于三条总线之一。

公开(公告)号：US4802236A

公开(公告)日：1989-01-31

申请号：US947783

申请日：1986-12-30

申请人： Thomas J. Walczak ,  Michael E. Rebeschini ,  Melvin A. Schechtman

发明人： Thomas J. Walczak ,  Michael E. Rebeschini ,  Melvin A. Schechtman

IPC分类号： H03C3/09 ,  H04B1/02

CPC分类号： H03C3/09

摘要： A modulation limiter that eliminates over-deviation otherwise caused by asymmetrical modulation signals in a frequency modulated (FM) transmitter. The output signal from a conventional modulation clipper is integrated, multiplied by a gain constant, and subtracted from the input, which causes the clipper output to have zero average and a high-pass frequency response with a time constant determined by the feedback gain. The zero average value allows the clipped modulation signal to be coupled to a modulator without over-deviation caused by shifts in the average value of the clipped signal, and the high-pass response can be used to give the modulation signal pre-emphasis.

摘要翻译： 一种调制限制器，消除了由调频（FM）发射机中的不对称调制信号引起的过度偏差。 来自常规调制限幅器的输出信号被积分，乘以增益常数，并从输入中减去，这导致限幅器输出具有零平均值和具有由反馈增益确定的时间常数的高通频率响应。 零平均值允许剪切调制信号被耦合到调制器，而不会由限幅信号的平均值的偏移引起过度偏差，并且可以使用高通响应来给出调制信号预加重。

公开(公告)号：US4798975A

公开(公告)日：1989-01-17

申请号：US85444

申请日：1987-08-13

申请人： Thomas J. Walczak ,  Michael P. Metroka

发明人： Thomas J. Walczak ,  Michael P. Metroka

IPC分类号： H03K3/288 ,  H03K3/2893 ,  H03K17/16 ,  H03K5/153

CPC分类号： H03K17/16 ,  H03K3/288 ,  H03K3/2893

摘要： A logic interface signal input with a high degree of electrical noise immunity, particularly suited for use in an automative environment for detecting an on/off control signal multiplexed with an information signal such as a voice audio signal. The invention provides a fast logic output signal in response to the level of the control signal, which is suitable for driving higher speed circuitry and which permits detection to be highly immune from electrical transients or variations in power supply voltage. The invention permits the information signal to be combined with the control signal through polarized means, such as an electrolytic capacitor.

摘要翻译： 具有高度电噪声抗扰度的逻辑接口信号输入，特别适用于用于检测与诸如语音音频信号的信息信号复用的开/关控制信号的自动环境。 本发明响应于控制信号的电平提供快速逻辑输出信号，其适用于驱动较高速度电路，并且允许检测高度免受电瞬变或电源电压变化的影响。 本发明允许信息信号通过诸如电解电容器的偏振装置与控制信号组合。