公开(公告)号：US5136713A

公开(公告)日：1992-08-04

申请号：US398860

申请日：1989-08-25

申请人： Richard Bealkowski ,  John W. Blackledge, Jr. ,  Doyle S. Cronk ,  Richard A. Dayan ,  Scott G. Kinnear ,  George D. Kovach ,  Matthew S. Palka, Jr. ,  Robert Sachsenmaier ,  Kevin M. Zyvoloski

发明人： Richard Bealkowski ,  John W. Blackledge, Jr. ,  Doyle S. Cronk ,  Richard A. Dayan ,  Scott G. Kinnear ,  George D. Kovach ,  Matthew S. Palka, Jr. ,  Robert Sachsenmaier ,  Kevin M. Zyvoloski

IPC分类号： G06F13/10 ,  G06F9/445

CPC分类号： G06F9/4406

摘要： An apparatus and method for decreasing the memory requirements of BIOS in a personal computer system includes storing a first portion of BIOS in memory and a second portion on a direct storage access device. The personal computer system comprises a system processor, a random access main memory, a read only memory, and at least one direct access storage device. The first portion of BIOS only includes routines for initializing the system and the direct access storage device to read in a master boot record into the system from the direct access storage device. The master boot record includes a data segment and an executable code segment. The first BIOS portion vectors the system processor to execute the executable code segment of the master boot record. The executable code segment loads in the remaining BIOS portion from the direct access storage device into random access memory superseding the first BIOS portion.

公开(公告)号：US5128995A

公开(公告)日：1992-07-07

申请号：US557334

申请日：1990-07-23

申请人： Lisa R. Arnold ,  Richard Bealkowski ,  John W. Blackledge, Jr. ,  Doyle S. Cronk ,  Richard A. Dayan ,  Douglas R. Geisler ,  Matthew T. Mittelstedt ,  Matthew S. Palka, Jr. ,  John D. Paul ,  Robert Sachsenmaier ,  Kenneth D. Smeltzer ,  Peter A. Woytovech ,  Kevin M. Zyvoloski

发明人： Lisa R. Arnold ,  Richard Bealkowski ,  John W. Blackledge, Jr. ,  Doyle S. Cronk ,  Richard A. Dayan ,  Douglas R. Geisler ,  Matthew T. Mittelstedt ,  Matthew S. Palka, Jr. ,  John D. Paul ,  Robert Sachsenmaier ,  Kenneth D. Smeltzer ,  Peter A. Woytovech ,  Kevin M. Zyvoloski

IPC分类号： G06F3/06 ,  G06F9/445 ,  G06F11/08 ,  G06F11/22 ,  G06F13/10

CPC分类号： G06F9/4406 ,  G06F11/08 ,  G06F11/22

摘要： A personal computer system according to the present invention comprises a system processor, a random access memory, a read only memory, and at least one direct access storage device. A direct access storage device controller coupled between the system processor and direct access storage device includes a protection mechanism for protecting a region of the storage device. The protected region of the storage device includes a master boot record, a BIOS image and a system reference diskette image. The BIOS image includes a section known as Power on Self Test (POST). POST is used to test and initialize a system. Upon detecting any configuration error, system utilities from the system reference diskette image, such as set configuration programs, diagnostic programs and utility programs can be automatically activated from the direct access storage device.

公开(公告)号：US5063496A

公开(公告)日：1991-11-05

申请号：US201651

申请日：1988-06-01

申请人： Richard A. Dayan ,  Douglas R. Geisler ,  Scott G. Kinnear ,  James F. Macon, Jr. ,  William H. Schwartz

发明人： Richard A. Dayan ,  Douglas R. Geisler ,  Scott G. Kinnear ,  James F. Macon, Jr. ,  William H. Schwartz

IPC分类号： G06F9/46 ,  G06F9/40

CPC分类号： G06F9/4425

摘要： A data processing system has a microprocessor, a memory system and a plurality of system devices the operation of which is controlled by BIOS routines. The BIOS routines are accessed through protected entry points. When an application program attempts to access one of the routines by using a hard coded instruction for jumping to such entry point, a BIOS signaling routine is executed which provides a signal to an operating system allowing the operating system to control the access without being bypassed.

摘要翻译： 数据处理系统具有微处理器，存储器系统和多个系统设备，其操作由BIOS程序控制。 通过受保护的入口点访问BIOS程序。 当应用程序尝试通过使用用于跳转到这样的入口点的硬编码指令来访问其中一个例程时，执行BIOS信号程序，其向操作系统提供信号，允许操作系统控制访问而不被旁路。

公开(公告)号：US09122875B2

公开(公告)日：2015-09-01

申请号：US11381237

申请日：2006-05-02

申请人： Steven A. Bade ,  Richard A. Dayan ,  James T. Hanna ,  Andrew G. Kegel

发明人： Steven A. Bade ,  Richard A. Dayan ,  James T. Hanna ,  Andrew G. Kegel

IPC分类号： G06F21/57

CPC分类号： G06F21/57 ,  G06F21/575 ,  H04L2463/101

摘要： Embodiments of the present invention address deficiencies of the art in respect to trusted platform module (TPM) unification in a trusted computing environment and provide a novel and non-obvious method, system and computer program product for trusted platform module data harmonization. In one embodiment of the invention, a TPM log harmonization method can include designating both a single master TPM for a master node among multiple nodes, and also a multiplicity of subsidiary TPMs for remaining ones of the nodes. The method further can include extending the single master TPM with a measurement representing a rendezvous operation for the nodes.

摘要翻译： 本发明的实施例解决了可信计算环境中可信任平台模块（TPM）统一方面的技术缺陷，并提供了一种用于可信平台模块数据协调的新颖且非显而易见的方法，系统和计算机程序产品。 在本发明的一个实施例中，TPM对数协调方法可以包括指定多个节点之间的主节点的单个主TPM，以及用于剩余节点的多个辅助TPM。 该方法还可以包括使用表示节点的会合操作的测量来扩展单个主TPM。

公开(公告)号：US07613872B2

公开(公告)日：2009-11-03

申请号：US11564096

申请日：2006-11-28

申请人： Richard A. Dayan ,  Scott N. Dunham

发明人： Richard A. Dayan ,  Scott N. Dunham

IPC分类号： G06F12/00

CPC分类号： G06F21/575 ,  G06F21/572

摘要： A flash memory is provided that includes a primary flash bank and a secondary flash bank. The primary flash bank includes CRTM logic and BIOS logic and the secondary flash bank comprises a backup copy of the CRTM logic and the BIOS logic. A switching mechanism is configured to selectively activate the primary flash bank or the secondary flash bank.

摘要翻译： 提供了一个闪存，它包括一个主闪存和一个次级闪存。 主闪存组包括CRTM逻辑和BIOS逻辑，次闪存组包括CRTM逻辑和BIOS逻辑的备份副本。 切换机构被配置为选择性地激活主闪存库或次闪存库。

公开(公告)号：US20080040612A1

公开(公告)日：2008-02-14

申请号：US11464330

申请日：2006-08-14

申请人： Richard A. Dayan ,  Jeffrey B. Jennings ,  Kofi Kekessie

发明人： Richard A. Dayan ,  Jeffrey B. Jennings ,  Kofi Kekessie

IPC分类号： H04L9/00

CPC分类号： G06F21/36

摘要： Methods, systems, and computer program products are provided for glyphword-based security. Embodiments include establishing a glyphword comprising a plurality of glyphs; and creating a plurality of glyphsheets wherein each glyphsheet includes one or more glyphs included in the established glyphword and one or more glyphs not included in the established glyphword; and for each glyphsheet: presenting to a user the glyphsheet; receiving from the user at least one selection of a glyph included in the glyphsheet; determining whether the glyphsheet is the last glyphsheet if the glyph selected by the user is not included in the glyphs of the glyphword; and providing access to a resource if the glyphsheet is the last glyphsheet.

摘要翻译： 提供方法，系统和计算机程序产品，用于基于字形的安全性。 实施例包括建立包括多个字形的字形; 并且创建多个字形表，其中每个字形表包括所建立的字形中包括的一个或多个字形和不包括在已建立的字形中的一个或多个字形; 并为每个字形表：向用户呈现字形表; 从用户接收包含在字形表中的字形的至少一个选择; 如果用户选择的字形不包括在字形的字形中，则确定字形表是否是最后一个字形; 并且如果字形表是最后一个字形表，则提供对资源的访问。

公开(公告)号：US07171568B2

公开(公告)日：2007-01-30

申请号：US10461569

申请日：2003-06-13

申请人： Richard A. Dayan ,  Gregory B. Pruett ,  David B. Rhoades

发明人： Richard A. Dayan ,  Gregory B. Pruett ,  David B. Rhoades

IPC分类号： G06F1/26

CPC分类号： G06F1/26

摘要： A system and method for remote power control across multiple nodes of a partitioned data processing system. The system includes one or more nodes, each node including a chassis housing a traditional SMP server. The system may be partitioned into two or more SPAR's. Partition management software provides out of band power control to an entire partition, regardless of the number of nodes in the partition. The partition management code installed on each node of the partition is enabled to broadcast a power-on request to each of the nodes in the partition. Thus, when any service processor receives a power-on request, that service processor will resend the power on request to the broadcast group, thereby causing all of the nodes in the SPAR to power up. The broadcast packets may be routed to the other nodes via an out-of-band or private management LAN. Using this implementation, existing network and system management software can reset the system by sending a normal power-on request to any service processor in the SPAR complex thereby minimizing the multi-node architecture's impact.

摘要翻译： 一种用于跨分区数据处理系统的多个节点进行远程电源控制的系统和方法。 该系统包括一个或多个节点，每个节点包括容纳传统SMP服务器的机箱。 该系统可以分为两个或更多的SPAR。 分区管理软件为整个分区提供带外功率控制，而不管分区中的节点数。 安装在分区的每个节点上的分区管理代码能够向分区中的每个节点广播上电请求。 因此，当任何服务处理器接收到上电请求时，该服务处理器将重新发送该请求的电力给广播组，从而使SPAR中的所有节点加电。 广播分组可以经由带外或专用管理LAN路由到其他节点。 使用此实现，现有的网络和系统管理软件可以通过向SPAR复合体中的任何服务处理器发送正常的上电请求来重置系统，从而最小化多节点架构的影响。

公开(公告)号：US07051159B2

公开(公告)日：2006-05-23

申请号：US10609753

申请日：2003-06-30

申请人： Richard A. Dayan

发明人： Richard A. Dayan

IPC分类号： G06F12/00

CPC分类号： G06F9/3834 ,  G06F9/325 ,  G06F9/3824 ,  G06F12/0862 ,  G06F12/0888 ,  G06F12/0891

摘要： A cache controller structure and method are provided for managing cache access for a computer system. The computer system has a processor having a direction flag and configured to run a repetitive string operation, wherein the string operation is configured to sequentially access a targeted memory block for each repetition depending on the state of the direction flag. A cache controller logic is provided to control a cache embedded in the processor while the processor executes string operations. The cache controller is configured to manipulate the cache lines responsive to the direction flag and to a position of a targeted memory block within a cache line. In some embodiments, the controller logic is also configured to manipulate the cache lines responsive to a repetition parameter value within the string operation.

摘要翻译： 提供了缓存控制器结构和方法来管理计算机系统的高速缓存访​​问。 计算机系统具有具有方向标志并被配置为运行重复字符串操作的处理器，其中串操作被配置为根据方向标志的状态来顺序地访问每个重复的目标存储器块。 提供高速缓存控制器逻辑以在处理器执行字符串操作时控制嵌入在处理器中的高速缓存。 高速缓存控制器被配置为响应于方向标志和高速缓存行内的目标存储器块的位置来操纵高速缓存行。 在一些实施例中，控制器逻辑还被配置为响应于串操作内的重复参数值来操纵高速缓存行。

公开(公告)号：US06647497B1

公开(公告)日：2003-11-11

申请号：US09282766

申请日：1999-03-31

申请人： Daryl C. Cromer ,  James P. Ward ,  Howard J. Locker ,  Richard A. Dayan ,  Michael J. Steinmetz

发明人： Daryl C. Cromer ,  James P. Ward ,  Howard J. Locker ,  Richard A. Dayan ,  Michael J. Steinmetz

IPC分类号： H04L900

CPC分类号： G06F21/88 ,  G06F21/31 ,  G06Q10/087 ,  G07C9/00111

摘要： Method and system aspects for securely transferring a computer system are described. A computer system is disabled at a shipping point via an RFID (radio frequency identification) interface and re-enabled at a receiving point via the RFID interface. Disabling the computer system includes selecting a boot password, writing the boot password to storage in the computer system via the RFID interface, and setting a disable bit in the storage via the, RFID interface. Re-enabling the computer system includes entering the boot password via the RFID interface and clearing the disable bit.

摘要翻译： 描述了用于安全地传送计算机系统的方法和系统方面。 通过RFID（射频识别）接口在出货点禁用计算机系统，并通过RFID接口在接收点重新启用。 禁用计算机系统包括选择启动密码，通过RFID接口将启动密码写入计算机系统中的存储，以及通过RFID接口设置存储器中的禁用位。 重新启用计算机系统包括通过RFID接口输入启动密码并清除禁用位。

公开(公告)号：US5970227A

公开(公告)日：1999-10-19

申请号：US640366

申请日：1996-04-30

申请人： Richard A. Dayan ,  Joseph P. McGovern ,  Palmer E. Newman

发明人： Richard A. Dayan ,  Joseph P. McGovern ,  Palmer E. Newman

IPC分类号： G06F1/00 ,  G06F21/00 ,  H04L9/10 ,  H04L9/00

CPC分类号： G06F21/88

摘要： A security system for computers defines a control zone using radiation, preferably at radio frequency, having a distinctive characteristic, such as a particular frequency. The zone may be established, for example, at a door exit or other limited passage to a secured area. Computer systems are provided with receivers that detect the distinctive characteristic and responsively produce an alarm signal which triggers security logic. The security logic cooperates with the start-up logic of the computer and disables start-up so that the computer becomes inoperative. In a more complex variation, the radiation triggers a device in the computer that in turn sends out a serial number signal. A receiver located near the control zone applies the serial number to a table look up computer that triggers an emergency signal if a match to an authorized list of serial numbers does not occur. The emergency signal activates a transmitter that sends out a radiation signal with a second distinctive characteristic. A second receiver in the computer then responds to the radiation with the second characteristic to trigger the security logic to render the computer inoperative.

摘要翻译： 用于计算机的安全系统定义了使用辐射的控制区，优选地在射频下具有特征，例如特定频率。 该区域可以例如在门出口或其他有限通道建立到安全区域。 计算机系统具有检测特征的接收器，并且响应地产生触发安全逻辑的报警信号。 安全逻辑与计算机的启动逻辑协同工作，禁止启动，使计算机无效。 在更复杂的变化中，辐射触发了计算机中的设备，而该设备又发出序列号信号。 位于控制区附近的接收器将序列号应用于表查询计算机，如果未发生与授权的序列号列表的匹配，则触发紧急信号。 紧急信号激活发送具有第二独特特征的辐射信号的发射机。 计算机中的第二个接收器然后响应具有第二特性的辐射来触发安全逻辑以使计算机不起作用。