Illumination fluence regulation system and method for use in thermal processing employed in the fabrication of reduced-dimension integrated circuits
    41.
    发明授权
    Illumination fluence regulation system and method for use in thermal processing employed in the fabrication of reduced-dimension integrated circuits 有权
    用于制造低维集成电路的热处理中的照明能量调节系统和方法

    公开(公告)号:US06570656B1

    公开(公告)日:2003-05-27

    申请号:US09546114

    申请日:2000-04-10

    IPC分类号: G03G1508

    摘要: The closed loop embodiment includes a pulsed laser controller to selectively operate a pulsed laser in a lower-power probe mode or a higher power operational mode. In lower-power probe mode, values of eT (total radiation energy flooding ICs on a silicon wafer), er (fraction of eT specularly reflected), es (fraction of eT scattered) and es (fraction of eT transmitted through wafer) are obtained. A value for ea (fraction of eT absorbed wafer) is calculated i.e. ea=eT−(er+es+et), and ea used by pulsed laser controller with pulsed laser in higher power operational mode to adjust pulsed laser fluence over the duration of a pulse to provide flooding radiation energy sufficient to melt an amorphized silicon surface layer beneath radiation-absorbent material, yet insufficient to melt crystalline silicon or ablate radiation-absorbent material. Open loop embodiment substitutes a separate low-power probe laser for operation in lower-power probe mode.

    摘要翻译: 闭环实施例包括脉冲激光控制器,以选择性地操作低功率探测模式或较高功率操作模式的脉冲激光。 在低功率探测模式下,获得eT(硅晶片上的总辐射能量驱动IC),er(eT镜面反射的分数),es(eT散射的分数)和es(通过晶片传输的eT的分数)的值 。 计算ea(eT吸收晶片的分数)的值,即ea = eT-(er + es + et),以及脉冲激光控制器在较高功率操作模式下使用脉冲激光控制器的ea,以调整脉冲激光注量 提供足以熔化放射线吸收材料下面的非晶硅表面层的淹没辐射能量的脉冲,但不足以熔化晶体硅或消融辐射吸收材料。 开环实施例将单独的低功率探头激光器替代为在较低功率探测模式下操作。

    Method of forming a silicide region in a Si substrate and a device having same
    42.
    发明授权
    Method of forming a silicide region in a Si substrate and a device having same 有权
    在Si衬底中形成硅化物区域的方法和具有该硅化物区域的器件

    公开(公告)号:US06420264B1

    公开(公告)日:2002-07-16

    申请号:US09896160

    申请日:2001-06-28

    申请人: Somit Talwar Yun Wang

    发明人: Somit Talwar Yun Wang

    IPC分类号: H01L2144

    CPC分类号: H01L21/28518

    摘要: A method of forming a silicide region (80) on a Si substrate (10) in the manufacturing of semiconductor integrated devices, a method of forming a semiconductor device (MISFET), and a device having suicide regions formed by the present method. The method of forming a suicide region involves forming a silicide region (80) in the (crystalline) Si substrate having an upper surface (12) and a lower surface (14). The method comprises the steps of first forming an amorphous doped region (40) in the Si substrate at or near the upper surface, to a predetermined depth (d). This results in the formation of an amorphous-crystalline interface (I) between the amorphous doped region and the crystalline Si substrate. The next step is forming a metal layer (60) atop the Si substrate upper surface, in contact with the amorphous doped region. The next step involves performing backside irradiation with a first radiation beam (66). This heats the interface sufficient to initiate explosive recrystallization (XRC) of amorphous doped region. This, in turn, provides heat to the metal layer sufficient to cause the diffusion of metal atoms from the metal layer into the amorphous doped region. In this manner, a silicide region of very high quality and low sheet resistance is formed in the Si substrate.

    摘要翻译: 在半导体集成器件的制造中,在Si衬底(10)上形成硅化物区域(80)的方法,形成半导体器件(MISFET)的方法以及通过本方法形成的具有硅化物区域的器件。 形成硅化物区域的方法包括在具有上表面(12)和下表面(14)的(晶体)Si衬底中形成硅化物区域(80)。 该方法包括以下步骤:首先在Si衬底中或在上表面附近形成非晶态掺杂区(40)至预定深度(d)。 这导致在非晶掺杂区域和晶体Si衬底之间形成非晶态界面(I)。 下一步是在Si衬底上表面上形成与非晶掺杂区接触的金属层(60)。 下一步涉及用第一辐射束(66)进行背面照射。 这加热了足以引发非晶掺杂区域的爆炸重结晶(XRC)的界面。 这反过来又向金属层提供足以使金属原子从金属层扩散到非晶掺杂区域中的热量。 以这种方式,在Si衬底中形成具有非常高质量和低薄层电阻的硅化物区域。

    Method of forming thermally induced reflectivity switch for laser thermal processing
    43.
    发明授权
    Method of forming thermally induced reflectivity switch for laser thermal processing 有权
    形成用于激光热处理的热致反射开关的方法

    公开(公告)号:US06383956B2

    公开(公告)日:2002-05-07

    申请号:US09933795

    申请日:2001-08-20

    IPC分类号: H01L21324

    摘要: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region. The reflectivity of the reflectivity switch layer changes from a low reflectivity state to a high reflectivity state at a critical temperature so as to limit the amount of radiation absorbed by the absorber layer by reflecting the incident radiation. This, in turn, limits the amount of heat transferred to the process region from the absorber layer.

    摘要翻译: 一种用于通过使用热诱导反射率开关层(60)从激光辐射(10)曝光来控制传送到工件(W)的处理区域(30)的热量的方法,装置和系统。 本发明的装置是具有沉积在工件上方的诸如硅晶片的吸收层(50)的薄膜叠层(6)。 吸收层的一部分覆盖工艺区域。 吸收层吸收激光辐射并将吸收的辐射转化成热。 反射开关层(60)沉积在吸收层顶部。 反射开关层可以包括一个或多个薄膜层,并且优选地包括热绝缘体层和过渡层。 覆盖处理区域的反射开关层的部分具有对应于处理区域的温度的温度。 反射率开关层的反射率在临界温度从低反射率状态变为高反射率状态,以通过反射入射辐射来限制吸收层吸收的辐射量。 这反过来限制了从吸收层传递到处理区域的热量。

    High-speed semiconductor transistor and selective absorption process forming same
    44.
    发明授权
    High-speed semiconductor transistor and selective absorption process forming same 有权
    高速半导体晶体管和选择性吸收工艺形成相同

    公开(公告)号:US06380044B1

    公开(公告)日:2002-04-30

    申请号:US09548326

    申请日:2000-04-12

    IPC分类号: H01L21336

    摘要: A high-speed semiconductor transistor and process for forming same. The process includes forming, in a Si substrate (10), spaced apart shallow trench isolations (STIs) (20), and a gate (36) atop the substrate between the STIs. Then, regions (40,44) of the substrate on either side of the gate are either amorphized and doped, or just doped. In certain embodiments of the invention, extension regions (60,62 or 60′,62′) and deep drain and deep source regions (80, 84 or 80′,84′) are formed. In other embodiments, just deep drain and deep source regions (80, 84 or 80′, 84′) are formed. A conformal layer (106) is then formed atop the substrate, covering the substrate surface (11) and the gate. The conformal layer can serve to absorb light and/or to distribute heat to the underlying structures. Then, at least one of front-side irradiation (110) and back-side irradiation (116) is performed to activate the drain and source regions and, if present, the extensions. Explosive recrystallization (124) is one mechanism used to achieve dopant activation. A deep dopant region (120) may be formed deep in the substrate to absorb light and release energy in the form of heat (122), which then activates the doped regions.

    摘要翻译: 高速半导体晶体管及其形成方法。 该工艺包括在Si衬底(10)中形成间隔开的浅沟槽隔离(STI)(20)和在STI之间的衬底顶部的栅极(36)。 然后,栅极两侧的衬底的区域(40,44)是非晶化的和掺杂的,或者仅仅是掺杂的。 在本发明的某些实施例中,形成了延伸区域(60,62或60',62')和深的漏极和深源区域(80,84或80',84')。 在其他实施例中,仅形成深的漏极和深源极区(80,84或80',84')。 然后在衬底顶部形成共形层(106),覆盖衬底表面(11)和栅极。 保形层可用于吸收光和/或将热量分配给下面的结构。 然后,执行前侧照射(110)和背面照射(116)中的至少一个,以激活漏极和源极区域(如果有的话)延伸部分。 爆炸性重结晶(124)是用于实现掺杂剂活化的一种机制。 深掺杂剂区域(120)可以形成在衬底的深处以吸收光并以热(122)的形式释放能量,然后激活掺杂区域。

    Methods for determining wavelength and pulse length of radiant energy used for annealing
    45.
    发明授权
    Methods for determining wavelength and pulse length of radiant energy used for annealing 有权
    用于确定用于退火的辐射能的波长和脉冲长度的方法

    公开(公告)号:US06326219B2

    公开(公告)日:2001-12-04

    申请号:US09286492

    申请日:1999-04-05

    IPC分类号: H01L2100

    摘要: The invention is directed to methods for determining the wavelength, pulse length and other important characteristics of radiant energy used to anneal or to activate the source and drain regions of an integrated transistor device which has been doped through implantation of dopant ions, for example. In general, the radiant energy pulse is determined to have a wavelength from 450 to 900 nanometers, a pulse length of 0.1 to 50 nanoseconds, and an exposure energy dose of from 0.1 to 1.0 Joules per square centimeter. A radiant energy pulse of the determined wavelength, pulse length and energy dose is directed onto the source and drain regions to trigger activation. In cases where the doped region has been rendered amorphous, activation requires crystallization using the crystal structure at the boundaries as a seed. In this case the radiant energy pulse causes the source and drain regions to crystallize with the same crystallographic orientation as the underlying substrate with the dopant ions incorporated into the crystalline lattice so that the source and drain regions are activated. To enhance absorption of the radiant energy used for annealing the doped regions, an anti-reflective layer can be formed over the doped regions before exposure. The radiant energy can be generated by a laser or other relatively intense, pulsed, radiant energy source. Selection of the source should be based on efficiency, the ability to distribute energy uniformly over an extended area and the ability to accurately control the energy content of a single pulse.

    摘要翻译: 本发明涉及用于确定用于退火或激活已经通过注入掺杂剂离子掺杂的集成晶体管器件的源极和漏极区域的辐射能的波长,脉冲长度和其它重要特性的方法。 通常,辐射能脉冲被确定为具有450-900纳米的波长,0.1至50纳秒的脉冲长度和0.1至1.0焦耳/平方厘米的曝光能量。 所确定的波长,脉冲长度和能量剂量的辐射能量脉冲被引导到源极和漏极区域以触发激活。 在掺杂区域变为无定形的情况下,活化需要使用边界处的晶体结构作为晶种进行结晶。 在这种情况下,辐射能量脉冲导致源极和漏极区域以与底部衬底相同的晶体取向结晶,掺杂剂离子结合到晶格中,使得源极和漏极区域被激活。 为了增强用于退火掺杂区域的辐射能的吸收,可以在曝光之前在掺杂区域上形成抗反射层。 辐射能可以由激光或其他相对强烈的脉冲辐射能源产生。 源的选择应基于效率,均匀分布在扩展区域上的能力以及准确控制单脉冲能量含量的能力。