公开(公告)号：US09716514B2

公开(公告)日：2017-07-25

申请号：US15160116

申请日：2016-05-20

Applicant: Texas Instruments Incorporated

Inventor： Eeshan Miglani ,  Karthikeyan Gunasekaran

IPC: H03M3/00 ,  H03M1/06 ,  H03M1/66

CPC classification number: H03M3/464 ,  H03M1/0665 ,  H03M1/66 ,  H03M3/424

Abstract: The disclosure provides a delta sigma modulator. The delta sigma modulator includes a summer. The summer generates an error signal in response to an input signal and a feedback signal. A loop filter is coupled to the summer and generates a filtered signal in response to the error signal. A quantizer is coupled to the loop filter and generates a quantized output signal in response to the filtered signal. A digital to analog converter (DAC) is coupled to the summer, and generates the feedback signal in response to a plurality of selection signals. A modified data weighted averaging (DWA) block is coupled between the quantizer and the DAC. The modified DWA block receives a clock signal and generates the plurality of selection signals in response to the quantized output signal and a primary coefficient. The primary coefficient varies with the clock signal.