公开(公告)号：US12081178B2

公开(公告)日：2024-09-03

申请号：US17869111

申请日：2022-07-20

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Martin Kinyua ,  Eric Soenen

IPC分类号： H03F3/217 ,  H03F1/02 ,  H03F3/185 ,  H03M3/00

CPC分类号： H03F3/2175 ,  H03F1/0233 ,  H03F3/185 ,  H03M3/424 ,  H03M3/494

摘要： An amplifier includes an input circuit configured to receive an analog input signal and a feedback signal, and output an analog error signal based on the analog input signal and the feedback signal. An ADC is configured to convert the analog error signal into a digital signal in a phase domain. A digital control circuit is configured to generate a digital control signal based on the digital signal in the phase domain. An output circuit is configured to generate an amplified output signal based on the digital control signal, and a feedback circuit is configured generate the feedback signal based on the amplified output signal.

公开(公告)号：US20240072822A1

公开(公告)日：2024-02-29

申请号：US18237842

申请日：2023-08-24

申请人： COMMISSARIAT A L’ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES

发明人： Dominique MORCHE ,  Arnaud VERDANT

IPC分类号： H03M3/00 ,  H03M1/08

CPC分类号： H03M3/352 ,  H03M1/0854 ,  H03M3/424

摘要： A multichannel transmit and/or receive system, each channel includes a DAC and a sigma-delta modulator the transfer function of which is expressed thus:


OUT(z)=IN(z)·FTS(z)+Q(z)·FTB(z),

where OUT is the output signal of the sigma-delta modulator, IN is the input signal of the sigma-delta modulator, FTS is the transfer function of the input signal, Q is the quantization noise and FTB is the transfer function of the quantization noise, the second terms of the transfer function of the sigma-delta modulator only being distinct from one another for two channels Vi, Vj, in order to decorrelate the quantization noise of distinct channels, the first term of said transfer function for channel Vi being equal to the first term of said transfer function for channel Vj.

公开(公告)号：US11799550B2

公开(公告)日：2023-10-24

申请号：US17734338

申请日：2022-05-02

申请人： CABLE TELEVISION LABORATORIES, INC.

发明人： Zhensheng Jia ,  Luis Alberto Campos ,  Curtis Dean Knittle ,  Jing Wang

IPC分类号： H04B10/2507 ,  H04B10/54 ,  H04B10/69 ,  H03M3/00

CPC分类号： H04B10/2507 ,  H04B10/541 ,  H04B10/697 ,  H03M3/424 ,  H03M3/43

摘要： An analog signal processor includes a sampling unit configured to (i) filter, in the frequency domain, a received time domain analog signal into a low-frequency end of a corresponding frequency spectrum, (ii) sample the filtered analog signal at a frequency substantially higher than the low-frequency end, and (iii) spread quantization noise over an expanded Nyquist zone of the corresponding frequency spectrum. The processor further includes a noise shaping unit configured to shape the spread quantization noise out of the low-frequency end of the corresponding frequency spectrum such that the filtered analog signal and the shaped quantization noise are substantially separated in the frequency domain, and a quantization unit configured to apply delta-sigma modulation to the filtered analog signal using at least one quantization bit, and output a digitized bit stream that substantially follows the amplitude of the received time domain analog signal.

公开(公告)号：US20190199559A1

公开(公告)日：2019-06-27

申请号：US16288057

申请日：2019-02-27

申请人： CABLE TELEVISION LABORATORIES, INC

发明人： Jing Wang ,  Luis Alberto Campos ,  Zhensheng Jia

IPC分类号： H04L25/49 ,  H04B10/2575 ,  H04W88/08 ,  H03M3/00

CPC分类号： H04B10/25753 ,  H03M3/424 ,  H03M3/43 ,  H03M3/454 ,  H03M3/496 ,  H04B1/0042 ,  H04B10/2575 ,  H04B10/541 ,  H04B2210/516 ,  H04J14/0298 ,  H04L25/4906 ,  H04Q11/0067 ,  H04Q11/0071 ,  H04Q11/02 ,  H04W88/085

摘要： A baseband processing unit includes a baseband processor configured to receive a plurality of component carriers of a radio access technology wireless service, and a delta-sigma digitization interface configured to digitize at least one carrier signal of the plurality of component carriers into a digitized bit stream, for transport over a transport medium, by (i) oversampling the at least one carrier signal, (ii) quantizing the oversampled carrier signal into the digitized bit stream using two or fewer quantization bits.

公开(公告)号：US20190199367A1

公开(公告)日：2019-06-27

申请号：US16013985

申请日：2018-06-21

申请人： SAMSUNG ELECTRONICS CO., LTD.

发明人： SEUNG IN NA ,  DA SOM PARK

IPC分类号： H03M3/00 ,  H03M1/46 ,  H03M7/30 ,  H03M1/14

CPC分类号： H03M3/46 ,  H03M1/145 ,  H03M1/462 ,  H03M3/424 ,  H03M3/446

摘要： A semiconductor device includes; a loop filter that receives a differential analog signal and generates a residue signal indicating an error between an analog input signal and an feedback signal, a first ADC that receives the residue signal and generates a first digital representation, a second ADC that receives the analog input signal and generates a second digital representation corresponding to the analog input signal, and a digital to analog converter (DAC) that receives a sum of the first digital representation and the second digital representation and generates the analog feedback signal. At least the first ADC is a multi-bit Successive Approximation Register ADC.

公开(公告)号：US20180309460A1

公开(公告)日：2018-10-25

申请号：US15914833

申请日：2018-03-07

申请人： Abhishek Bandyopadhyay ,  Daniel Peter Canniff ,  Mariana Tosheva Markova ,  Edward Chapin Guthrie

发明人： Abhishek Bandyopadhyay ,  Daniel Peter Canniff ,  Mariana Tosheva Markova ,  Edward Chapin Guthrie

IPC分类号： H03M3/00 ,  H03M1/06 ,  H03M1/36 ,  H03M3/02 ,  H03M3/04

CPC分类号： H03M3/424 ,  H03M1/002 ,  H03M1/066 ,  H03M1/361 ,  H03M1/365 ,  H03M3/02 ,  H03M3/04 ,  H03M3/32 ,  H03M3/452 ,  H03M3/464

摘要： A multibit flash quantizer circuit, such as included as a portion of delta-sigma conversion circuit, can be operated in a dynamic or configurable manner. Information indicative of at least one of an ADC input slew rate or a prior quantizer output code can be used to establish a flash quantizer conversion window. Within the selected conversion window, comparators in the quantizer circuit can be made active. Comparators outside the conversion window can be made dormant, such as depowered or biased to save power. An output from such dormant converters can be preloaded and latched. In this manner, full resolution is available without requiring that all comparator circuits within the quantizer remain active at all times.

公开(公告)号：US09948318B1

公开(公告)日：2018-04-17

申请号：US15784198

申请日：2017-10-16

申请人： MEDIATEK INC.

发明人： Hung-Chieh Tsai

IPC分类号： H03M3/00

CPC分类号： H03M3/424 ,  H03M3/322 ,  H03M3/358 ,  H03M3/454 ,  H03M3/458

摘要： A delta-sigma modulator includes a receiving circuit, a loop filter, a quantizer with a negative capacitor circuit and a feedback circuit. The receiving circuit is arranged for receiving an input signal and a feedback signal to generate a first signal. The loop filter is coupled to the receiving circuit, and is arranged for receiving the first signal to generate a filtered signal. The quantizer is coupled to the loop filter, and is arranged for generating a digital output signal according to the filtered signal, wherein the negative capacitor circuit is arranged at an input terminal of the quantizer. The feedback circuit is arranged for receiving the digital output signal to generate the feedback signal.

公开(公告)号：US09923572B2

公开(公告)日：2018-03-20

申请号：US15087625

申请日：2016-03-31

申请人： Cypress Semiconductor Corporation

发明人： Rishi Raghav Bacchu ,  Kaveh Hosseini ,  Dermot MacSweeney ,  Paul M. Walsh ,  Kofi Makinwa

IPC分类号： H03M3/00 ,  G01R27/26 ,  H03F3/45 ,  H03M3/02

CPC分类号： H03M3/322 ,  G01R27/2605 ,  H03F3/45071 ,  H03F3/45475 ,  H03F2200/129 ,  H03F2203/45146 ,  H03F2203/45288 ,  H03F2203/45522 ,  H03M3/02 ,  H03M3/424

摘要： A circuit, system, and method for measuring capacitance are described. A current may be received at an input of a conversion circuit. The current may be converted to a voltage signal which may be used to create a negative feedback current to the input of the conversion circuit and which may be demodulated digitally to provide a static digital output representative of a capacitance.

公开(公告)号：US09912348B1

公开(公告)日：2018-03-06

申请号：US15378689

申请日：2016-12-14

申请人： GM GLOBAL TECHNOLOGY OPERATIONS LLC

发明人： Cynthia D. Baringer ,  Mohiuddin Ahmed ,  Jongchan Kang ,  Yen-Cheng Kuan ,  James Chingwei Li ,  Emilio A. Sovero ,  Timothy J. Talty

IPC分类号： H04B1/14 ,  H03M3/00 ,  H04B1/00 ,  G05D1/00 ,  H04L27/00 ,  H04W88/06 ,  H04W84/12

CPC分类号： H03M3/458 ,  G05D1/0088 ,  H03M3/396 ,  H03M3/398 ,  H03M3/424 ,  H03M3/46 ,  H04B1/0014 ,  H04B1/0017 ,  H04B1/0078 ,  H04L27/0008 ,  H04W84/12 ,  H04W88/06

摘要： A wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a radio receiver composed of a demodulator operative to work in a delta sigma mode and a Nyquist mode, and wherein a filter and feedback loop may utilized in response to the modulation mode of an RF signal.

公开(公告)号：US20180017445A1

公开(公告)日：2018-01-18

申请号：US15705298

申请日：2017-09-15

申请人： Elmos Semiconductor AG

发明人： Artur Suntken

IPC分类号： G01J5/10 ,  G01J1/46 ,  H03M1/12 ,  G08B13/191 ,  H03M3/00

CPC分类号： G01J5/10 ,  G01J1/46 ,  G08B13/191 ,  H03B5/1206 ,  H03M1/12 ,  H03M3/424 ,  H03M3/458

摘要： A system for measuring a sensor having two terminals includes first and second transistors with first and second control signal inputs connected to the sensor terminals. The system further includes a current divider including a reference current input, a current divider control input and first and second current outputs connected to the first and second transistors. First and second load circuits are connected to the first and second transistors at first and second differential output nodes. First and second integrating circuits are connected to the first and second differential output nodes. A comparator is driven by first and second differential output nodes. The comparator output controls a digital integrator. A value of a current divider control signal driving the current divider control input depends at least indirectly from the digital integrator.