公开(公告)号：US11502056B2

公开(公告)日：2022-11-15

申请号：US16924147

申请日：2020-07-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Chih-Wei Wu ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Ying-Ching Shih ,  Cheng-Chieh Li

IPC: H01L23/48 ,  H01L23/00

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes first and second package components stacked upon and electrically connected to each other. The first package component includes first and second conductive bumps, the second package component includes third and fourth conductive bumps, and dimensions of the first and second conductive bumps are less than those of the third and fourth conductive bumps. The semiconductor package includes a first joint structure partially wrapping the first conductive bump and the third conductive bump, and a second joint structure partially wrapping the second conductive bump and the fourth conductive bump. A curvature of the first joint structure is different from a curvature of the second joint structure.

公开(公告)号：US11328936B2

公开(公告)日：2022-05-10

申请号：US16510474

申请日：2019-07-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Jui-Hsieh Lai ,  Shang-Yun Hou

IPC: H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: A structure and a formation method of a package structure are provided. The method includes forming one or more solder elements over a substrate. The one or more solder elements surround a region of the substrate. The method also includes disposing a semiconductor die structure over the region of the substrate. The method further includes dispensing a polymer-containing liquid onto the region of the substrate. The one or more solder elements confine the polymer-containing liquid to being substantially inside the region. In addition, the method includes curing the polymer-containing liquid to form an underfill material.

公开(公告)号：US20210366802A1

公开(公告)日：2021-11-25

申请号：US16881004

申请日：2020-05-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sung-Hui Huang ,  Shang-Yun Hou ,  Tien-Yu Huang ,  Heh-Chang Huang ,  Kuan-Yu Huang ,  Shu-Chia Hsu ,  Yu-Shun Lin

IPC: H01L23/31 ,  H01L25/16

Abstract: A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.

公开(公告)号：US20210305173A1

公开(公告)日：2021-09-30

申请号：US16917920

申请日：2020-07-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shang-Yun Hou

IPC: H01L23/00 ,  H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L23/48 ,  H01L25/00 ,  H01L21/56 ,  H01L21/78

Abstract: A semiconductor device including a first semiconductor die, a second semiconductor die, an insulating encapsulation and a warpage control pattern is provided. The first semiconductor die includes an active surface and a rear surface opposite to the active surface. The second semiconductor die is disposed on the active surface of the first semiconductor die. The insulating encapsulation is disposed on the active surface of the first semiconductor die and laterally encapsulates the second semiconductor die. The warpage control pattern is disposed on and partially covers the rear surface of the first semiconductor die.

公开(公告)号：US20210193538A1

公开(公告)日：2021-06-24

申请号：US16920408

申请日：2020-07-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shang-Yun Hou ,  Chien-Yuan Huang

IPC: H01L23/04 ,  H01L23/538 ,  H01L23/31 ,  H01L25/065 ,  H01L21/52

Abstract: A semiconductor structure and a method for fabricating the same are disclosed. A semiconductor structure includes a first substrate, a package, a second substrate, and a lid. The package is attached to a first side of the first substrate. The second substrate is attached to a second side of the first substrate. The lid is connected to the first substrate and the second substrate. The lid includes a ring part over the first side of the first substrate. The ring part and the first substrate define a space and the package is accommodated in the space. The lid further includes a plurality of overhang parts which extend from corner sidewalls of the ring part toward the second substrate to cover corner sidewalls of the first substrate.

公开(公告)号：US20210125907A1

公开(公告)日：2021-04-29

申请号：US16798404

申请日：2020-02-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shang-Yun Hou

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/053 ,  H01L21/48

Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, connective terminals and supports. The circuit substrate has a first side and a second side opposite to the first side. The semiconductor package is connected to the first side of the circuit substrate. The connective terminals are located on the second side of the circuit substrate and are electrically connected to the semiconductor package via the circuit substrate. The supports are located on the second side of the circuit substrate beside the connective terminals. A material of the supports has a melting temperature higher than a melting temperature of the connective terminals.

公开(公告)号：US10886147B1

公开(公告)日：2021-01-05

申请号：US16571786

申请日：2019-09-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kuan-Yu Huang ,  Sung-Hui Huang ,  Shang-Yun Hou

IPC: H01L21/48 ,  H01L21/56

Abstract: A method for forming the package structure is provided. The method includes forming a die structure over a first surface of a first substrate, and forming a plurality of electrical connectors below a second surface of the first substrate. The method also includes forming a first protruding structure below the second surface of the first substrate, and the electrical connectors are surrounded by the first protruding structure. The method further includes forming a second protruding structure over a second substrate, and bonding the first substrate to the second substrate. The electrical connectors are surrounded by the second protruding structure, and the first protruding structure does not overlap with the second protruding structure.