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公开(公告)号：US20210366802A1
公开(公告)日：2021-11-25
申请号：US16881004
申请日：2020-05-22
发明人： Sung-Hui Huang , Shang-Yun Hou , Tien-Yu Huang , Heh-Chang Huang , Kuan-Yu Huang , Shu-Chia Hsu , Yu-Shun Lin
摘要： A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.
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公开(公告)号：US20240297166A1
公开(公告)日：2024-09-05
申请号：US18664483
申请日：2024-05-15
发明人： Shang-Yun Hou , Sung-Hui Huang , Kuan-Yu Huang , Hsien-Pin Hu , Yushun Lin , Heh-Chang Huang , Hsing-Kuo Hsia , Chih-Chieh Hung , Ying-Ching Shih , Chin-Fu Kao , Wen-Hsin Wei , Li-Chung Kuo , Chi-Hsi Wu , Chen-Hua Yu
IPC分类号： H01L25/00 , H01L21/48 , H01L23/00 , H01L23/24 , H01L23/31 , H01L23/498 , H01L25/065 , H01L25/18
CPC分类号： H01L25/50 , H01L21/4803 , H01L21/4853 , H01L23/24 , H01L23/3128 , H01L23/49827 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/92 , H01L24/97 , H01L2224/0401 , H01L2224/1144 , H01L2224/1145 , H01L2224/11462 , H01L2224/11464 , H01L2224/16145 , H01L2224/16227 , H01L2224/16235 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81191 , H01L2224/81815 , H01L2224/92125 , H01L2224/92225 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/14 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1461 , H01L2924/15311 , H01L2924/18161
摘要： An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.
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公开(公告)号：US11694939B2
公开(公告)日：2023-07-04
申请号：US16881004
申请日：2020-05-22
发明人： Sung-Hui Huang , Shang-Yun Hou , Tien-Yu Huang , Heh-Chang Huang , Kuan-Yu Huang , Shu-Chia Hsu , Yu-Shun Lin
CPC分类号： H01L23/3185 , H01L25/167
摘要： A semiconductor package includes a substrate, a stacked structure, an encapsulation material, a lid structure, and a coupler. The stacked structure is disposed over and bonded to the substrate. The encapsulation material partially encapsulates the stacked structure. The lid structure is disposed on the substrate, wherein the lid structure surrounds the stacked structure and covers a top surface of the stacked structure. The coupler is bonded to the stacked structure, wherein a portion of the coupler penetrates through and extends out of the lid structure.
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公开(公告)号：US12015023B2
公开(公告)日：2024-06-18
申请号：US17355433
申请日：2021-06-23
发明人： Shang-Yun Hou , Sung-Hui Huang , Kuan-Yu Huang , Hsien-Pin Hu , Yushun Lin , Heh-Chang Huang , Hsing-Kuo Hsia , Chih-Chieh Hung , Ying-Ching Shih , Chin-Fu Kao , Wen-Hsin Wei , Li-Chung Kuo , Chi-Hsi Wu , Chen-Hua Yu
IPC分类号： H01L25/00 , H01L21/48 , H01L23/24 , H01L23/31 , H01L23/498 , H01L25/065 , H01L25/18 , H01L23/00
CPC分类号： H01L25/50 , H01L21/4803 , H01L21/4853 , H01L23/24 , H01L23/3128 , H01L23/49827 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/92 , H01L24/97 , H01L2224/0401 , H01L2224/1144 , H01L2224/1145 , H01L2224/11462 , H01L2224/11464 , H01L2224/16145 , H01L2224/16227 , H01L2224/16235 , H01L2224/17181 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81191 , H01L2224/81815 , H01L2224/92125 , H01L2224/92225 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/14 , H01L2924/1431 , H01L2924/1432 , H01L2924/1434 , H01L2924/1461 , H01L2924/15311 , H01L2924/18161 , H01L2224/97 , H01L2224/83 , H01L2224/97 , H01L2224/81
摘要： An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.
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公开(公告)号：US20210320097A1
公开(公告)日：2021-10-14
申请号：US17355433
申请日：2021-06-23
发明人： Shang-Yun Hou , Sung-Hui Huang , Kuan-Yu Huang , Hsien-Pin Hu , Yushun Lin , Heh-Chang Huang , Hsing-Kuo Hsia , Chih-Chieh Hung , Ying-Ching Shih , Chin-Fu Kao , Wen-Hsin Wei , Li-Chung Kuo , Chi-Hsi Wu , Chen-Hua Yu
IPC分类号： H01L25/00 , H01L25/065 , H01L23/24 , H01L23/31 , H01L23/498 , H01L21/48 , H01L25/18
摘要： An integrated circuit package and a method of forming the same are provided. The method includes attaching an integrated circuit die to a first substrate. A dummy die is formed. The dummy die is attached to the first substrate adjacent the integrated circuit die. An encapsulant is formed over the first substrate and surrounding the dummy die and the integrated circuit die. The encapsulant, the dummy die and the integrated circuit die are planarized, a topmost surface of the encapsulant being substantially level with a topmost surface of the dummy die and a topmost surface of the integrated circuit die. An interior portion of the dummy die is removed. A remaining portion of the dummy die forms an annular structure.
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