公开(公告)号：US20120146124A1

公开(公告)日：2012-06-14

申请号：US12967436

申请日：2010-12-14

申请人： Walid M. Hafez ,  Anisur Rahman

发明人： Walid M. Hafez ,  Anisur Rahman

IPC分类号： H01L29/788 ,  H01L21/28

CPC分类号： H01L29/792 ,  G11C16/0466 ,  H01L21/28282 ,  H01L28/40 ,  H01L29/4234 ,  H01L29/513 ,  H01L45/00

摘要： A non-volatile storage element and a method of forming the storage element. The non-volatile storage element comprises: a first electrode including a first material having a first work function; a second electrode including a second material having a second work function higher than the first work function; a first dielectric disposed between the first electrode and the second electrode, the first dielectric having a first bandgap; a second dielectric disposed between the first dielectric and the second electrode, the second dielectric having a second bandgap wider than the first bandgap and being disposed such that a quantum well is created in the first dielectric; and a third dielectric disposed between the first electrode and the first dielectric, the third dielectric being thinner than the second dielectric and having a third bandgap wider than the first bandgap.

摘要翻译： 非易失性存储元件和形成存储元件的方法。 非易失性存储元件包括：第一电极，其包括具有第一功函数的第一材料; 第二电极，包括具有高于第一功函数的第二功函数的第二材料; 设置在所述第一电极和所述第二电极之间的第一电介质，所述第一电介质具有第一带隙; 设置在所述第一电介质和所述第二电极之间的第二电介质，所述第二电介质具有比所述第一带隙宽的第二带隙，并且被布置为使得在所述第一电介质中产生量子阱; 以及设置在所述第一电极和所述第一电介质之间的第三电介质，所述第三电介质比所述第二电介质薄，并且具有比所述第一带隙宽的第三带隙。

公开(公告)号：US20120043609A1

公开(公告)日：2012-02-23

申请号：US12858770

申请日：2010-08-18

申请人： Walid M. Hafez ,  Chia-Hong Jan ,  Anisur Rahman

发明人： Walid M. Hafez ,  Chia-Hong Jan ,  Anisur Rahman

IPC分类号： H01L27/088 ,  H01L21/768

CPC分类号： H01L29/45 ,  H01L21/823418 ,  H01L27/088 ,  H01L27/0922 ,  H01L29/0847 ,  H01L29/456 ,  H01L29/495 ,  H01L29/66659 ,  H01L29/78 ,  H01L29/7816 ,  H01L29/7835

摘要： An apparatus includes a first device with a metal gate and a drain well that experiences a series resistance that drops a drain contact voltage from 10 V to 4-6 V at a junction between the drain well and a channel under the gate. The apparatus includes an interlayer dielectric layer (ILD0) disposed above and on the drain well and a salicide drain contact in the drain well. The apparatus also includes a subsequent device that is located in a region different from the first device that operates at a voltage lower than the first device.

摘要翻译： 一种装置包括具有金属栅极和漏极阱的第一器件，其经受在漏极阱和栅极之下的沟道之间的接点处的漏极接触电压从10V降低至4-6V的串联电阻。 该装置包括设置在排水井上方和排水井上的层间电介质层（ILD0）和排水井中的自对准硅排放接头。 该设备还包括位于与低于第一设备的电压工作的第一设备不同的区域中的后续设备。

公开(公告)号：US20110147837A1

公开(公告)日：2011-06-23

申请号：US12646698

申请日：2009-12-23

申请人： Walid M. Hafez ,  Anisur Rahman

发明人： Walid M. Hafez ,  Anisur Rahman

IPC分类号： H01L29/78 ,  H01L27/092 ,  H01L21/28

CPC分类号： H01L29/4983 ,  H01L21/823842 ,  H01L29/0653 ,  H01L29/402 ,  H01L29/66659 ,  H01L29/78 ,  H01L29/7835

摘要： A semiconductor chip having a transistor is described. The transistor having a gate electrode disposed over a gate dielectric. The gate electrode comprised of first gate material disposed on the gate dielectric and second gate material disposed on the gate dielectric. The first gate material being different than the second gate material. The second gate material also located at a source region or drain region of said gate electrode.

摘要翻译： 描述具有晶体管的半导体芯片。 晶体管具有设置在栅极电介质上的栅电极。 所述栅电极由设置在所述栅极电介质上的第一栅极材料和设置在所述栅极电介质上的第二栅极材料组成。 第一栅极材料与第二栅极材料不同。 第二栅极材料也位于所述栅电极的源极区或漏极区。