公开(公告)号：US11695238B2

公开(公告)日：2023-07-04

申请号：US17342191

申请日：2021-06-08

申请人： Veea Inc.

发明人： Robert Migliorino ,  Michael Mirabella ,  Shaun Joseph Greaney ,  Michael Liccone

IPC分类号： H01R13/633 ,  H01R13/50

CPC分类号： H01R13/6335 ,  H01R13/501

摘要： Various embodiments include a connector head assembly for an electrical cable attached to one or more receptacle connectors. The connector head assembly may include an elongate overmold having a longitudinal extent that is longer than a height or width thereof. The elongate overmold may be configured to encase a terminal end of the electrical cable coupled to the one or more receptacle connectors inside the elongate overmold. The connector head assembly may also include a pull tab pivotally attached to the elongate overmold on an upper surface thereof. A pulling force applied to the pull tab may be configured to separate the receptacle connector from a receptacle in which the receptacle connector is configured to be held.

公开(公告)号：US20230087792A1

公开(公告)日：2023-03-23

申请号：US18053264

申请日：2022-11-07

申请人： Veea Inc.

发明人： Robert MIGLIORINO ,  Michael MIRABELLA ,  Clint SMITH

IPC分类号： H05K1/02 ,  H05K1/11

摘要： A multiple layer printed circuit board including a plurality of layers, vertical interconnect accesses (VIAs), and a vertical interconnect access (VIA) bridge. The layers may include signal layers, prepreg substrate layers disposed between the signal layers, ground plane layers, wherein each of the ground plane layers abuts one of the prepreg substrate layers, inner signal layers, wherein each of the inner signal layers abuts one of the prepreg substrate layers, and a core substrate layer disposed between the signal layers, wherein two of the inner signal layers abut opposed sides of the core substrate layer. The VIAs extend through at least some of the layers, wherein each of the VIAs is formed by aligned apertures through adjoining ones of the prepreg substrate layers, ground plane layers, and inner signal layers. The VIA bridge is coupled to the VIAs to convey heat to a heat sink.

公开(公告)号：US11606419B2

公开(公告)日：2023-03-14

申请号：US17867194

申请日：2022-07-18

申请人： VEEA Inc.

发明人： Timothy James Speight ,  Nicholas Jelbert ,  Stephen Robert Calvert

IPC分类号： H04L67/101 ,  G06F9/50 ,  H04L43/0882 ,  H04L67/1012 ,  H04L67/00 ,  H04L43/16

摘要： An edge computing system comprises: a cloud computing system; an edge processing function; a connection between the edge processing function and the cloud computing system; a backend server within the cloud computing system. An assessment module is configured to receive information about processing goals, and processing capabilities of the backend server and the edge processing function. The assessment module derives a set of possible interfaces and corresponding functionality splits defining a division of processing activity between the backend server and the edge processing function. Based on a received measurement of bandwidth and/or of latency on the connection, the assessment module selects an interface and corresponding functionality split, and downloads them to the edge processing function and the backend server.

公开(公告)号：US20230017840A1

公开(公告)日：2023-01-19

申请号：US17946450

申请日：2022-09-16

申请人： Veea Inc.

发明人： Shaun Joseph GREANEY ,  Robert MIGLIORINO ,  Michael LICCONE ,  Clint SMITH

IPC分类号： H05K1/02

摘要： A multiple layer printed circuit board (PCB) in which the cores (or core layers) are removed and replaced with prepreg layers, which provide structure integrity for the PCB. Such a multi-layer PCB may include signal layers, ground plane layers, inner signal layers, and a single core substrate layer. Each of the layers may be separated from the other layers by at least one prepreg substrate layer.