公开(公告)号：US20080229993A1

公开(公告)日：2008-09-25

申请号：US12067159

申请日：2006-12-18

Applicant: Young-hak Seo ,  Sung-jin Kim ,  Byeong-Seog Kang

Inventor： Young-hak Seo ,  Sung-jin Kim ,  Byeong-Seog Kang

IPC: B63H25/38

CPC classification number: B63H25/38

Abstract: Disclosed herein is a spade rudder, which is intended to relieve bending moment generated by a rudder, and to suppress vibrations generated from the rudder due to a propeller, in the case of a large ship. The spade rudder has a rudder stock for rotating a rudder, and a vertical bearing provided on a side surface of the rudder stock. The spade rudder further includes a stock gudgeon provided on a side surface of the vertical bearing, a horizontal bearing provided under the stock gudgeon, and a horizontal bearing housing provided at the junction of the rudder stock and the horizontal bearing, which are at right angles to each other, and dispersing a bending moment acting on the rudder.

Abstract translation: 这里公开了一种铲式舵，其旨在减轻舵的产生的弯矩，并且在大型船的情况下，抑制由于螺旋桨而由舵产生的振动。 锹舵有一个方向舵转向舵，一个垂直轴承设在舵杆的侧面。 锹舵还包括设置在垂直轴承的侧表面上的原料舵，设置在舵柄下方的水平轴承，以及设置在舵杆与水平轴承的接合点处的水平轴承壳体，它们是直角 并分散作用在舵上的弯矩。

公开(公告)号：US20080213416A1

公开(公告)日：2008-09-04

申请号：US12120449

申请日：2008-05-14

Applicant: Sung-Jin Kim

Inventor： Sung-Jin Kim

IPC: A61K36/00 ,  A61P25/00

CPC classification number: A61K36/73

Abstract: Disclosed is a composition containing an extract of Rubi Fructus for preventing and treating anxiety, depression and dementia and improving memory. The composition can be used as drugs and dietary supplements which induce prophylactic and therapeutic effects on anxiety, depression and dementia as well as memory-improving effect in the moderns afflicted with the modification of neurotransmitter releases and brain damage caused by external environmental factors including various kinds of stresses, menopause, drinking alcohols, smoking cigarettes and others.

Abstract translation: 本发明公开了一种含有Rubi Fructus提取物的组合物，用于预防和治疗焦虑，抑郁和痴呆并改善记忆。 该组合物可用作药物和膳食补充剂，其对焦虑，抑郁和痴呆的预防和治疗效果以及受到外界环境因素（包括各种类型）引起的神经递质释放和脑损伤的改善的现代人的记忆改善作用 压力，绝经，饮酒，吸烟等。

公开(公告)号：US07417286B2

公开(公告)日：2008-08-26

申请号：US11280045

申请日：2005-11-15

Applicant: Sung-Jin Kim ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Jong-Hyuk Kim ,  Kun-Ho Kwak ,  Hoon Lim

Inventor： Sung-Jin Kim ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Jong-Hyuk Kim ,  Kun-Ho Kwak ,  Hoon Lim

IPC: H01L23/62

CPC classification number: H01L27/0688 ,  H01L21/8221

Abstract: Semiconductor integrated circuit devices having single crystalline thin film transistors and methods of fabricating the same are provided. The semiconductor integrated circuit devices include an interlayer insulating layer formed on a semiconductor substrate and a single crystalline semiconductor plug penetrating the interlayer insulating layer. A single crystalline semiconductor body pattern is provided on the interlayer insulating layer. The single crystalline semiconductor body pattern has an elevated region and contacts the single crystalline semiconductor plug. The method of forming the single crystalline semiconductor body pattern having the elevated region includes forming a sacrificial layer pattern covering the single crystalline semiconductor plug on the interlayer insulating layer. A capping layer is formed to cover the sacrificial layer pattern and the interlayer insulating layer, and the capping layer is patterned to form an opening which exposes a portion of the sacrificial layer pattern. Subsequently, the sacrificial layer pattern is selectively removed to form a cavity in the capping layer, and a planarized single crystalline semiconductor body pattern is formed to fill the cavity and the opening.

Abstract translation: 提供具有单晶薄膜晶体管的半导体集成电路器件及其制造方法。 半导体集成电路器件包括形成在半导体衬底上的层间绝缘层和贯穿层间绝缘层的单晶半导体插件。 在层间绝缘层上设置单晶体半导体图案。 单晶半导体主体图案具有升高的区域并与单晶半导体插头接触。 形成具有升高区域的单晶半导体主体图案的方法包括在层间绝缘层上形成覆盖单晶半导体插塞的牺牲层图案。 形成覆盖牺牲层图案和层间绝缘层的覆盖层，并且对覆盖层进行图案化以形成露出牺牲层图案的一部分的开口。 随后，选择性地去除牺牲层图案以在封盖层中形成空腔，并且形成平坦化的单晶半导体主体图案以填充空腔和开口。

公开(公告)号：US20080054333A1

公开(公告)日：2008-03-06

申请号：US11847090

申请日：2007-08-29

Applicant: SUNG JIN KIM

Inventor： SUNG JIN KIM

IPC: H01L29/788 ,  H01L21/336

CPC classification number: H01L29/42324 ,  H01L21/26513 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/66636 ,  H01L29/7881

Abstract: Provided are a semiconductor device and a manufacturing method thereof. A pair of adjacent gate structure can be formed on a substrate. Mask patterns exposing a portion located between the gate structures are formed. The substrate portion located between the gate structures can be etched using the mask patterns as an etch mask to form a pocket. First conduction type impurities can be implanted into the pocket to form a first impurity layer in a surface of the pocket. Second conduction type impurities can be implanted into the pocket to form a second impurity layer on the first impurity layer. The pocket can be filled with an insulating material. Accordingly, impurities having a type opposite to the type of source junction impurities are implanted into the pocket to reduce a potential barrier of a source junction. Consequently, punch-through generated between a source and a drain can be inhibited.

Abstract translation: 提供半导体器件及其制造方法。 可以在基板上形成一对相邻的栅极结构。 形成露出位于栅极结构之间的部分的掩模图案。 可以使用掩模图案作为蚀刻掩模来蚀刻位于栅极结构之间的衬底部分，以形成口袋。 可以将第一导电型杂质注入到口袋中以在口袋的表面中形成第一杂质层。 可以将第二导电型杂质注入到口袋中以在第一杂质层上形成第二杂质层。 口袋可以填充绝缘材料。 因此，具有与源极结杂质类型相反的类型的杂质注入口袋中以减少源极结的势垒。 因此，可以抑制在源极和漏极之间产生的穿通。

公开(公告)号：US20080011340A1

公开(公告)日：2008-01-17

申请号：US11806520

申请日：2007-05-31

Applicant: Eui Soo Kim ,  Yong Woon Han ,  Young Ho Kwon ,  Shimotera Kennichi ,  Sung Jin Kim ,  Jung Chan Ryu ,  Joe Young Choi

Inventor： Eui Soo Kim ,  Yong Woon Han ,  Young Ho Kwon ,  Shimotera Kennichi ,  Sung Jin Kim ,  Jung Chan Ryu ,  Joe Young Choi

IPC: B08B3/10

CPC classification number: A47L15/4246 ,  A47L15/4225

Abstract: A dish washing machine capable of improving spatial utilization of a washing tub through the enlargement of the washing tub. The dish washing machine includes a washing tub, a sump mounted in the washing tub to receive and pump wash water, a sump housing forming an external appearance of the sump, a washing impeller to pump wash water from the sump housing, a drainage channel disposed at an inner edge of the sump housing, a pump motor surrounded by the drainage pump to drive the washing impeller, and a pump motor receiving part to receive the pump motor. The pump motor receiving part protrudes above the drainage channel.

Abstract translation: 一种能够通过放大洗涤桶来提高洗涤桶的空间利用率的洗碗机。 洗碗机包括洗涤桶，安装在洗涤桶中以接收和泵送洗涤水的贮槽，形成贮槽外观的贮槽外壳，用于从贮槽壳体泵送洗涤水的洗涤叶轮，设置的排水通道 在贮槽壳体的内边缘处，由排水泵包围以驱动洗涤叶轮的泵马达和用于接收泵马达的泵马达接收部分。 泵电机接收部分突出在排水通道上方。

公开(公告)号：US20080011335A1

公开(公告)日：2008-01-17

申请号：US11806519

申请日：2007-05-31

Applicant: Eui Soo Kim ,  Yong Woon Han ,  Young Ho Kwon ,  Shimotera Kennichi ,  Sung Jin Kim ,  Jung Chan Ryu ,  Jae Young Choi

Inventor： Eui Soo Kim ,  Yong Woon Han ,  Young Ho Kwon ,  Shimotera Kennichi ,  Sung Jin Kim ,  Jung Chan Ryu ,  Jae Young Choi

IPC: B08B3/10

CPC classification number: A47L15/4246 ,  A47L15/4204 ,  A47L15/4225 ,  A47L15/4276

Abstract: A dish washing machine capable of smoothly discharging dirt contained in wash water out of a sump so as to prevent the emission of bad smells from the dirt and prevent the propagation of bacteria. The dish washing machine includes a sump to receive and pump wash water, a sump housing forming an external appearance of the sump, a drainage pump coupled with the sump housing to discharge wash water and dirt, and a drainage channel disposed in the sump housing to guide wash water and dirt to the drainage pump.

Abstract translation: 洗碗机能够顺利地从洗涤水中排出洗涤水中的污物，以防止从污垢中排出不良气味并防止细菌繁殖。 洗碗机包括用于接收和泵送洗涤水的贮槽，形成贮槽的外观的贮槽壳体，与贮槽壳体结合以排出洗涤水和污物的排水泵，以及设置在贮槽壳体中的排水通道 引导清洗水和污垢到排水泵。

公开(公告)号：US20070273029A1

公开(公告)日：2007-11-29

申请号：US11839478

申请日：2007-08-15

Applicant: Sung-Jin KIM ,  Seung-Hyun CHANG ,  Ki-Heum NAM

Inventor： Sung-Jin KIM ,  Seung-Hyun CHANG ,  Ki-Heum NAM

IPC: H01L23/52 ,  G03C5/00 ,  H01L21/3205

CPC classification number: G03F1/00 ,  G03F1/70

Abstract: A photo mask set for forming multi-layered interconnection lines and a semiconductor device fabricated using the same includes a first photo mask for forming lower interconnection lines and a second photo mask for forming upper interconnection lines. The first and second photo masks have lower opaque patterns parallel with each other and upper opaque patterns that overlap the lower opaque patterns. In this case, ends of the lower opaque patterns are located on a straight line that crosses the lower opaque patterns. As a result, when upper interconnection lines are formed using the second photo mask, poor photo resist patterns can be prevented from being formed despite the focusing of reflected light.

Abstract translation: 用于形成多层互连线的光掩模组和使用其形成的半导体器件包括用于形成下互连线的第一光掩模和用于形成上互连线的第二光掩模。 第一和第二光掩模具有彼此平行的较低的不透明图案和与下部不透明图案重叠的上部不透明图案。 在这种情况下，下部不透明图案的端部位于与下部不透明图案交叉的直线上。 结果，当使用第二光掩模形成上互连线时，即使反射光聚焦，也可以防止形成差的光刻胶图形。

公开(公告)号：US20070241335A1

公开(公告)日：2007-10-18

申请号：US11766655

申请日：2007-06-21

Applicant: Kun-Ho KWAK ,  Jae-Hoon JANG ,  Soon-Moon JUNG ,  Won-Seok CHO ,  Hoon LIM ,  Sung-Jin KIM ,  Byung-Jun HWANG ,  Jong-Hyuk KIM

Inventor： Kun-Ho KWAK ,  Jae-Hoon JANG ,  Soon-Moon JUNG ,  Won-Seok CHO ,  Hoon LIM ,  Sung-Jin KIM ,  Byung-Jun HWANG ,  Jong-Hyuk KIM

IPC: H01L27/108

CPC classification number: H01L27/1108 ,  H01L27/11

Abstract: Methods of fabricating a semiconductor integrated circuit having thin film transistors using an SEG technique are provided. The methods include forming an inter-layer insulating layer on a single-crystalline semiconductor substrate. A single-crystalline semiconductor plug extends through the inter-layer insulating layer, and a single-crystalline epitaxial semiconductor pattern is in contact with the single-crystalline semiconductor plug on the inter-layer insulating layer. The single-crystalline epitaxial semiconductor pattern is at least partially planarized to form a semiconductor body layer on the inter-layer insulating layer, and the semiconductor body layer is patterned to form a semiconductor body. As a result, the semiconductor body includes at least a portion of the single-crystalline epitaxial semiconductor pattern. Thus, the semiconductor body has an excellent single-crystalline structure. Semiconductor integrated circuits fabricated using the methods are also provided.

Abstract translation: 提供了使用SEG技术制造具有薄膜晶体管的半导体集成电路的方法。 所述方法包括在单晶半导体衬底上形成层间绝缘层。 单晶半导体插件延伸穿过层间绝缘层，并且单晶外延半导体图案与层间绝缘层上的单晶半导体插头接触。 单晶外延半导体图案至少部分地平坦化以在层间绝缘层上形成半导体本体层，并且对半导体本体层进行图案化以形成半导体本体。 结果，半导体本体包括单晶外延半导体图案的至少一部分。 因此，半导体本体具有优异的单晶结构。 还提供了使用这些方法制造的半导体集成电路。

公开(公告)号：US07276421B2

公开(公告)日：2007-10-02

申请号：US11197836

申请日：2005-08-05

Applicant: Jong-Hyuk Kim ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Kun-Ho Kwak ,  Sung-Jin Kim ,  Jae-Joo Shim

Inventor： Jong-Hyuk Kim ,  Soon-Moon Jung ,  Won-Seok Cho ,  Jae-Hoon Jang ,  Kun-Ho Kwak ,  Sung-Jin Kim ,  Jae-Joo Shim

IPC: H01L21/331

CPC classification number: H01L21/8221 ,  H01L21/28525 ,  H01L21/76877 ,  H01L27/0688 ,  H01L27/11 ,  H01L27/1108 ,  H01L27/12 ,  H01L29/785

Abstract: Methods of forming a single crystal semiconductor thin film on an insulator and semiconductor devices fabricated thereby are provided. The methods include forming an interlayer insulating layer on a single crystal semiconductor layer. A single crystal semiconductor plug is formed to penetrate the interlayer insulating layer. A semiconductor oxide layer is formed within the single crystal semiconductor plug using an ion implantation technique and an annealing technique. As a result, the single crystal semiconductor plug is divided into a lower plug and an upper single crystal semiconductor plug with the semiconductor oxide layer being interposed therebetween. That is, the upper single crystal semiconductor plug is electrically insulated from the lower plug by the semiconductor oxide layer. A single crystal semiconductor pattern is formed to be in contact with the upper single crystal semiconductor plug and cover the interlayer insulating layer. The single crystal semiconductor pattern is grown by an epitaxy growth technique using the upper single crystal semiconductor plug as a seed layer, or by a solid epitaxy growth technique using the upper single crystal semiconductor plug as a seed layer.

Abstract translation: 提供了在绝缘体上形成单晶半导体薄膜的方法和由此制造的半导体器件。 所述方法包括在单晶半导体层上形成层间绝缘层。 形成单晶半导体插塞以穿透层间绝缘层。 使用离子注入技术和退火技术在单晶半导体插头内形成半导体氧化物层。 结果，单晶半导体插头被分成下插头和上部单晶半导体插头，半导体氧化物层之间插入其中。 也就是说，上单晶半导体插头通过半导体氧化物层与下插塞电绝缘。 单晶半导体图案形成为与上单晶半导体插头接触并覆盖层间绝缘层。 通过使用上部单晶半导体插塞作为种子层的外延生长技术，或通过使用上部单晶半导体插塞作为种子层的固体外延生长技术，生长单晶半导体图案。

公开(公告)号：US07260366B2

公开(公告)日：2007-08-21

申请号：US10222221

申请日：2002-08-16

Applicant: Yong-Suk Lee ,  Sung-Jin Kim ,  Jong-Hyeuk Lee ,  Sang-Hwan Park ,  Hun-Kee Kim

Inventor： Yong-Suk Lee ,  Sung-Jin Kim ,  Jong-Hyeuk Lee ,  Sang-Hwan Park ,  Hun-Kee Kim

IPC: H04B1/02 ,  H04B7/00 ,  H04J3/16

CPC classification number: H04L1/06 ,  H04B7/061 ,  H04B7/08 ,  H04L1/0003 ,  H04L1/0026 ,  H04L1/0041 ,  H04L1/007 ,  H04L1/0071 ,  H04L2001/0096 ,  H04W72/085 ,  H04W72/10

Abstract: A data transmitting/receiving apparatus and method using an antenna array in a mobile communication system. A Node B measures a transmission status of each transmission antenna, classifies transmission data according to priority, and transmits to a UE high-priority data through a transmission antenna at a relatively good transmission status and low-priority data through a transmission antenna at a relatively poor transmission status.

Abstract translation: 一种在移动通信系统中使用天线阵列的数据发送/接收装置和方法。 节点B测量每个发送天线的发送状态，根据优先级对发送数据进行分类，并且通过发送天线以相对良好的发送状态和低优先级数据通过发送天线相对发送到UE的高优先级数据 传输状态差。