Balun transformer with improved harmonic suppression
    51.
    发明授权
    Balun transformer with improved harmonic suppression 有权
    平衡变压器具有改进的谐波抑制

    公开(公告)号:US07683733B2

    公开(公告)日:2010-03-23

    申请号:US12025315

    申请日:2008-02-04

    IPC分类号: H03H7/42 H01P5/00

    摘要: An electronic assembly includes a substrate (66), a balun transformer (42) formed on the substrate (66) and including a first winding (50) and a second winding (52), each having respective first and second ends, and a reaction circuit component (48) formed on the substrate (66) and electrically coupled to the second winding (52) between the first and second ends thereof. The balun transformer (42) and the reaction circuit component (48) jointly form a harmonically suppressed balun transformer having a fundamental frequency, and the reaction circuit component (48) is tuned such that the harmonically suppressed balun transformer resonates at a selected harmonic of the fundamental frequency.

    摘要翻译: 电子组件包括衬底(66),形成在衬底(66)上并包括第一绕组(50)和第二绕组(52)的平衡不平衡变压器(42),每个具有相应的第一和第二端,以及反应 电路部件(48),形成在所述基板(66)上并且在所述第一和第二端之间电连接到所述第二绕组(52)。 平衡 - 不平衡变压器(42)和反应电路部件(48)共同形成具有基频的谐波抑制平衡不平衡变压器,并且调谐反应电路部件(48),使得谐波抑制的平衡不平衡变压器以所选择的谐波谐振 基频

    APPARATUS AND METHOD FOR DETECTING TIMESLOT CONFLICT BETWEEN OPTICAL NETWORK UNITS IN OPTICAL COMMUNICATION NETWORK
    53.
    发明申请
    APPARATUS AND METHOD FOR DETECTING TIMESLOT CONFLICT BETWEEN OPTICAL NETWORK UNITS IN OPTICAL COMMUNICATION NETWORK 审中-公开
    用于检测光通信网络中光网络单元之间的时间冲突的装置和方法

    公开(公告)号:US20090245781A1

    公开(公告)日:2009-10-01

    申请号:US12310329

    申请日:2007-08-23

    IPC分类号: H04J14/00

    CPC分类号: H04B10/0779 H04J3/1694

    摘要: The objective of the present invention is to provide a solution for detecting timeslot conflict between Optical Network Units (ONUs) in an Optical Line Terminal (OLT). When all ONUs are deactivated and there is still any light signal in the upstream, each ONU is notified to switch off the power supply of its transmitter one by one to detect whether there is any failure ONU; when all ONUs are deactivated and there is no light signal in the upstream, the failed ONU can be located through ranging the ONUs separately. The solution can be implemented through software update, without affecting the intrinsic hardware design.

    摘要翻译: 本发明的目的是提供一种用于检测光线路终端(OLT)中的光网络单元(ONU)之间的时隙冲突的解决方案。 当所有的ONU都被去激活,并且上游还有任何光信号时,通知每个ONU逐个关闭其发射机的电源,以检测ONU是否有故障; 当所有ONU都被禁用,上游没有光信号时,可以通过单独测量ONU来定位故障ONU。 该解决方案可以通过软件更新实现,而不影响固有的硬件设计。

    Programmable amplitude compensation circuit
    54.
    发明授权
    Programmable amplitude compensation circuit 有权
    可编程幅度补偿电路

    公开(公告)号:US07586342B2

    公开(公告)日:2009-09-08

    申请号:US12072437

    申请日:2008-02-26

    IPC分类号: H03B1/00

    CPC分类号: H03G3/001

    摘要: According to one exemplary embodiment, an amplitude compensation circuit includes a first composite programmable buffer for receiving a first input signal with a first input amplitude. The amplitude compensation circuit further includes a second composite programmable buffer for receiving a second input signal with a second input amplitude. The amplitude compensation circuit also includes a feedback circuit coupled to respective outputs of the first and second composite programmable buffers. According to this embodiment, the feedback circuit compares a first output amplitude of the first composite programmable buffer with a reference voltage and a second output amplitude of the second composite programmable buffer with the reference voltage and provides first and second control signals for adjusting the respective gains of the first and second composite programmable buffers so as to reduce respective differences between the first and second output amplitudes and the reference voltage.

    摘要翻译: 根据一个示例性实施例,幅度补偿电路包括用于接收具有第一输入幅度的第一输入信号的第一复合可编程缓冲器。 幅度补偿电路还包括用于接收具有第二输入幅度的第二输入信号的第二复合可编程缓冲器。 振幅补偿电路还包括耦合到第一和第二复合可编程缓冲器的相应输出的反馈电路。 根据该实施例,反馈电路将第一复合可编程缓冲器的第一输出幅度与具有参考电压的第二复合可编程缓冲器的参考电压和第二输出幅度进行比较,并提供用于调整相应增益的第一和第二控制信号 的第一和第二复合可编程缓冲器,以便减小第一和第二输出幅度与参考电压之间的差异。

    CACHE AFFILIATION IN IPTV EPG SERVER CLUSTERING
    56.
    发明申请
    CACHE AFFILIATION IN IPTV EPG SERVER CLUSTERING 审中-公开
    IPTV EPG服务器群集中的高速缓存处理

    公开(公告)号:US20090019493A1

    公开(公告)日:2009-01-15

    申请号:US11776947

    申请日:2007-07-12

    IPC分类号: H04N5/445

    摘要: An EPG service architecture incorporates multiple EPG servers connected in a cluster. An active dispatcher is associated with at least one EPG server and multiple standby dispatchers are associated with the cluster. A plurality of STBs interfaced with the EPG server cluster issue requests for EPG service for which the active dispatcher employs an affiliation table as a portion of the cache for redirecting each request to a specific one of the EPG servers affiliated with the STB issuing the request. The active dispatcher multicasts the affiliation table to the multiple standby dispatchers for synchronization.

    摘要翻译: EPG服务架构集成了多个连接在集群中的EPG服务器。 主动调度器与至少一个EPG服务器相关联,并且多个备用调度器与集群相关联。 与EPG服务器集群接口的多个STB发出对EPG服务的请求,活动调度员使用附属表作为缓存的一部分,将每个请求重定向到与发出请求的STB相关联的EPG服务器的特定一个。 活动分派器将附属表组播到多个备用分派器进行同步。

    BALUN SIGNAL TRANSFORMER
    57.
    发明申请
    BALUN SIGNAL TRANSFORMER 审中-公开
    BALUN信号变压器

    公开(公告)号:US20080258837A1

    公开(公告)日:2008-10-23

    申请号:US11737270

    申请日:2007-04-19

    申请人: Lianjun Liu Qiang Li

    发明人: Lianjun Liu Qiang Li

    IPC分类号: H03H7/42

    摘要: A system 20 includes an unbalanced device 22, a balanced device 24, and a balun (balanced-unbalanced) signal transformer 26 interposed between devices 22 and 24. The balun signal transformer 26 includes a balanced external port section 32 formed by ports 40 and 42. The balun signal transformer 26 includes a symmetric transformer 48 having a balanced port 50 formed by terminals 52 and 54. Terminal 52 is electrically interconnected with port 40, and an inductor 64 is interposed between terminal 54 and port 42. The inductor 64 shifts a phase of a signal component 72 at terminal 54 to balance substantially one hundred eighty degrees out-of-phase with a signal component 70 at terminal 52.

    摘要翻译: 系统20包括不平衡装置22,平衡装置24和插入在装置22和24之间的平衡 - 不平衡转换器(平衡 - 不平衡)信号变压器26.平衡不平衡变换器信号变压器26包括由端口40和42形成的平衡外部端口部分32 平衡不平衡变压器信号变压器26包括具有由端子52和54形成的平衡端口50的对称变压器48.端子52与端口40电互连,并且电感器64插入在端子54和端口42之间。电感器64移位 在端子54处的信号部件72的相位相平衡,以平衡与端子52处的信号部件70基本上相差180度的异相。

    OFDM/OFDMA TIMING SYNCHRONIZATION USING NON-CONSECUTIVE PILOT SUBCARRIER ASSIGNMENT
    58.
    发明申请
    OFDM/OFDMA TIMING SYNCHRONIZATION USING NON-CONSECUTIVE PILOT SUBCARRIER ASSIGNMENT 有权
    OFDM / OFDMA时序同步使用非相关的导频子载波分配

    公开(公告)号:US20080240263A1

    公开(公告)日:2008-10-02

    申请号:US11694647

    申请日:2007-03-30

    申请人: Qiang Li

    发明人: Qiang Li

    IPC分类号: H04L27/28

    摘要: Systems and methods which are adapted determine timing with respect to an orthogonal frequency division (OFD) channel, such as may be used with respect to an OFDM or OFDMA systems through reliably identifying timing of a first arriving signal path. Embodiments use deconvolution to construct the channel impulse response associated with a received signal. The first arriving path for the received signal may readily and reliably be determined using the channel impulse response information.

    摘要翻译: 被适配的系统和方法确定相对于正交频分(OFD)信道的定时,例如可以通过可靠地识别第一到达信号路径的定时来相对于OFDM或OFDMA系统使用。 实施例使用去卷积来构造与接收信号相关联的信道脉冲响应。 可以使用信道脉冲响应信息容易且可靠地确定接收信号的第一到达路径。

    Method And System For Network Search
    59.
    发明申请
    Method And System For Network Search 有权
    网络搜索方法与系统

    公开(公告)号:US20080162408A1

    公开(公告)日:2008-07-03

    申请号:US12050716

    申请日:2008-03-18

    申请人: Qiang Li

    发明人: Qiang Li

    IPC分类号: G06F17/30

    CPC分类号: G06F17/30699 G06F17/30864

    摘要: The present invention provides a network search system, including: a search initiating client, configured to initiate a search request to a resource search server, and acquire network resource according to a resource feature information index returned by a resource search server; the resource search server, configured to acquire a search response client corresponding to the search initiating client according to a corresponding relation between the search response client and the search initiating client, search a resource index server corresponding to the search response client according to the search request, and return the resource feature information index to the search initiating client; the resource index server, configured to store the resource feature information index reported by the search response client. A network search method is also disclosed. By use of the present invention, it is possible to improve the instant performance of network search and the individuation of the search result.

    摘要翻译: 本发明提供一种网络搜索系统,包括:搜索发起客户端,被配置为向资源搜索服务器发起搜索请求,并根据资源搜索服务器返回的资源特征信息索引获取网络资源; 所述资源搜索服务器被配置为根据所述搜索响应客户端和所述搜索发起客户端之间的对应关系来获取与所述搜索发起客户端对应的搜索响应客户端,根据所述搜索请求搜索对应于所述搜索响应客户端的资源索引服务器 并将资源特征信息索引返回给搜索发起客户端; 资源索引服务器,被配置为存储由搜索响应客户端报告的资源特征信息索引。 还公开了网络搜索方法。 通过使用本发明,可以提高网络搜索的即时性能和搜索结果的个性化。

    Method and System for Buffering A Clock Signal
    60.
    发明申请
    Method and System for Buffering A Clock Signal 审中-公开
    缓冲时钟信号的方法和系统

    公开(公告)号:US20080136498A1

    公开(公告)日:2008-06-12

    申请号:US11618863

    申请日:2006-12-31

    IPC分类号: H03K3/01

    摘要: A method and system for buffering a clock signal is provided. The method may include self-biasing a PMOS transistor of a buffer, utilized for amplifying an in-phase/quadrature phase signal, to produce a first bias voltage at the gate of a PMOS transistor, and biasing an NMOS transistor of the buffer via a controllable current source to produce a second bias voltage at the gate of the NMOS transistor. The gain of the buffer may be controlled by varying a controllable current source coupled to a second NMOS transistor configured as a diode. Two coupling capacitors may be utilized to remove a DC component of the signal. Multiple buffers may be coupled end-to-end to increase the overall drive capability, where the channel width of the transistors within the transistors may be doubled in each successive buffer.

    摘要翻译: 提供了一种用于缓冲时钟信号的方法和系统。 该方法可以包括自偏压缓冲器的PMOS晶体管,用于放大同相/正交相位信号,以在PMOS晶体管的栅极处产生第一偏置电压,并经由一个PMOS晶体管偏置缓冲器的NMOS晶体管 可控电流源,以在NMOS晶体管的栅极处产生第二偏置电压。 可以通过改变耦合到配置为二极管的第二NMOS晶体管的可控电流源来控制缓冲器的增益。 可以使用两个耦合电容器来去除信号的DC分量。 多个缓冲器可以端对端耦合以增加总体驱动能力,其中晶体管内的晶体管的沟道宽度可以在每个连续的缓冲器中加倍。