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51.发明申请公开(公告)号：US20240371454A1
公开(公告)日：2024-11-07
申请号：US18773836
申请日：2024-07-16
Inventor： Xuehuan FENG , Yongqian LI
IPC: G11C19/28
Abstract: A shift register includes a first scan unit including a first input circuit and a first output circuit, and a second scan unit including a second input circuit, a second output circuit, and a fourth transistor. The first input circuit is electrically connected to an input signal terminal and a first pull-up node. The first output circuit is electrically connected to the first pull-up node, a first clock signal terminal, a second clock signal terminal, a shift signal terminal, and a first scan signal terminal. The second input circuit is electrically connected to the input signal terminal and a second pull-up node. The second output circuit is electrically connected to the second pull-up node, a third clock signal terminal, and a second scan signal terminal. The fourth transistor is electrically connected to the second pull-up node, a sub-clock signal terminal, and a dummy shift signal terminal.
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公开(公告)号：US20240365615A1
公开(公告)日：2024-10-31
申请号：US18765377
申请日：2024-07-08
Inventor： Luke DING , Yongqian LI
IPC: H10K59/131 , G09G3/3233 , H10K59/12 , H10K59/124
CPC classification number: H10K59/131 , G09G3/3233 , H10K59/1201 , H10K59/124 , G09G2300/0819 , G09G2300/0842 , G09G2310/08
Abstract: A display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a base substrate, and a display area and a mounting area provided on the base substrate; the display area includes multiple second pixel circuits, the mounting area includes multiple first pixel circuits, and an area of an orthographic projection of a first pixel circuit on the base substrate is smaller than an area of an orthographic projection of a second pixel circuit on the base substrate.
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公开(公告)号：US20240215422A1
公开(公告)日：2024-06-27
申请号：US17791262
申请日：2021-09-28
Inventor： Zhidong YUAN , Pan XU , Yongqian LI , Can YUAN
IPC: H10K59/88 , G01R31/28 , G09G3/3233 , G09G3/3266 , H10K71/70
CPC classification number: H10K59/88 , G01R31/2884 , G09G3/3233 , G09G3/3266 , H10K71/70 , G09G2300/0408 , G09G2300/0842 , G09G2310/0286 , G09G2310/08 , G09G2330/12
Abstract: A display panel, and a test method thereof, a display apparatus, each subpixel of the pixel array of the display panel includes a pixel circuit, a first signal line configured to provide a scanning signal to the pixel circuit, a scan driver circuit configured to provide the scanning signal to the pixel circuit and includes a shift register and a clock signal line in the display area; a test circuit board in the non-display area and including a test pad; and a test lead in the non-display area and electrically connected with the test pad. The first signal line includes a first part in the display area and a second part in the non-display area, the first part extends substantially along the first direction.
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公开(公告)号：US20240177663A1
公开(公告)日：2024-05-30
申请号：US17789938
申请日：2021-07-09
Inventor： Yongqian LI , Can YUAN , Zhongyuan WU
IPC: G09G3/3233 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/131 , G09G2300/0408 , G09G2300/0452 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/08
Abstract: A display substrate and a display panel are provided. The display substrate includes: a base substrate; and a plurality of sub-pixels. Each sub-pixel includes a light-emitting element and a pixel circuit; the pixel circuit includes a driving circuit, a data writing circuit, a first control circuit, a second control circuit, and a light-emitting control circuit; the driving circuit is configured to control the driving current flowing through the light-emitting element; the light-emitting control circuit is configured to apply the driving current to the light-emitting element; the first control circuit is configured to write a reference voltage into the driving circuit; the second control circuit is configured to write an initial voltage into the first electrode of the light-emitting element; and orthographic projections of at least part of pixel circuits of every two adjacent sub-pixels in a same row of sub-pixels on the base substrate are mirror-symmetrical.
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公开(公告)号：US20240161687A1
公开(公告)日：2024-05-16
申请号：US17772955
申请日：2021-05-13
Inventor： Meng LI , Yongqian LI , Chen XU , Jingquan WANG , Dacheng ZHANG , Yu WANG , Zhidong YUAN , Zhenhua QIU
IPC: G09G3/3225 , H10K59/131
CPC classification number: G09G3/3225 , H10K59/131 , G09G2300/0408 , G09G2300/0452 , G09G2300/0842
Abstract: The present disclosure provides a display substrate and a display device, and belongs to the field of display technologies. The display substrate includes a base substrate, a plurality of pixels, a plurality of gate lines and a plurality of data lines, wherein the base substrate has a plurality of transparent regions and a plurality of display regions, and the transparent regions and the display regions alternate with each other in a first direction; the pixels are on the base substrate and within the display regions; pixels within each of the display regions are arranged in a second direction; each pixel includes a plurality of sub pixels; the sub pixels of each pixel are divided into two rows of sub pixels; each row of sub pixels are arranged in the first direction; the first direction intersects the second direction; the gate lines and the data lines are on the base substrate; the gate lines extend along the first direction; the data lines extend along the second direction; the sub pixels of a first pixel are connected with the same gate line; the gate line connected with the sub pixels of the first pixel is between the two rows of sub pixels of the first pixel; and the first pixel is any one of the plurality of pixels.
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Patent Agency Ranking
公开(公告)号：US20240155889A1
公开(公告)日：2024-05-09
申请号：US17770650
申请日：2021-05-26
Inventor： Yongqian LI , Zhidong YUAN
IPC: H10K59/131 , H10K59/121 , H10K59/80
CPC classification number: H10K59/131 , H10K59/1213 , H10K59/1216 , H10K59/8792
Abstract: A display panel and a display device, wherein the display panel includes a display area and the display panel further includes: a base substrate, a third conductive layer, a pixel electrode layer, a common electrode layer, the third conductive layer is disposed at a side of the base substrate and includes a first conductive part in the display area. The pixel electrode layer is disposed at a side of the third conductive layer away from the base substrate, the common electrode layer is disposed at a side of the pixel electrode layer away from the base substrate, the common electrode layer includes at least a through-hole contacting part in the display area connected to the first conductive part via a first through hole.
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公开(公告)号：US20240057420A1
公开(公告)日：2024-02-15
申请号：US18494897
申请日：2023-10-26
Inventor： Can YUAN , Yongqian LI , Meng LI , Zhidong YUAN , Dacheng ZHANG , Lang LIU
IPC: H10K59/131 , G09G3/3233 , G09G3/3266 , G09G3/3275 , H10K50/813 , H10K50/824 , H10K59/122 , H10K59/124 , H10K59/121 , H10K71/00
CPC classification number: H10K59/1315 , G09G3/3233 , G09G3/3266 , G09G3/3275 , H10K50/813 , H10K50/824 , H10K59/122 , H10K59/124 , H10K59/1216 , H10K71/00 , G09G2300/0426
Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction. The display substrate further includes data lines extended in the first direction, and the data lines are connected in one-to-one correspondence with the sub-pixels in columns in each row of sub-pixels, so as to provide data signals respectively; the display substrate further includes auxiliary electrode lines extended in the first direction which are configured to be electrically connected with a second electrode of the light emitting element to provide a second power voltage; each of the auxiliary electrode lines is spaced from any one of the plurality of data lines by at least one column of sub-pixels.
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58.发明公开公开(公告)号：US20230306924A1
公开(公告)日：2023-09-28
申请号：US17776267
申请日：2020-11-24
Inventor： Xuehuan FENG , Yongqian LI
CPC classification number: G09G3/3677 , G09G3/2092 , G09G2310/0286 , G09G2310/08
Abstract: A shift register circuit includes an input sub-circuit, an output sub-circuit and a control sub-circuit. The input sub-circuit is coupled to a first input signal terminal and a pull-up node, and configured to, under control of a first input signal, transmit the first input signal to the pull-up node. The output sub-circuit is at least coupled to the pull-up node, a first clock signal terminal and a first signal output terminal, and configured to transmit a first clock signal to the first signal output terminal under control of a voltage at the pull-up node. The control sub-circuit is coupled to at least one first reference node, at least one first control signal terminal and the pull-up node, and configured to transmit a voltage at a first reference node to the pull-up node under control of a first control signal.
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公开(公告)号：US20230196994A1
公开(公告)日：2023-06-22
申请号：US18108730
申请日：2023-02-13
Inventor： Xuehuan FENG , Yongqian LI , Hao LIU
IPC: G09G3/3225 , G11C19/28 , G09G3/3266
CPC classification number: G09G3/3225 , G11C19/28 , G09G3/3266 , G09G2310/0286
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, a leakage prevention circuit and a blanking input sub-circuit, wherein the first sub-circuit comprises a first input circuit and a first output circuit; the second sub-circuit comprises a second input circuit and a second output circuit; the leakage prevention circuit is configured to control a level of a leakage prevention node under control of the level of the first node, so as to turn off a circuit connected between the first node and the leakage prevention node; and the blanking input sub-circuit is connected to the first node and the second node, and is configured to receive a selection control signal and a first clock signal, and control the level of the first node and the level of the second node.
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公开(公告)号：US20230154410A1
公开(公告)日：2023-05-18
申请号：US17642983
申请日：2020-10-23
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G09G3/3233 , H10K59/131 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/3233 , H10K59/131 , G11C19/28 , G09G2310/0286 , G09G2300/0426 , G09G2300/0842 , G09G2330/021
Abstract: A display panel includes a plurality of rows of sub-pixels and at least one gate driver circuit that are disposed on a base substrate. Each sub-pixel includes a pixel driver circuit and a light-emitting device coupled to the pixel driver circuit, and a gate driver circuit includes a plurality of shift registers that are cascaded and a plurality of control signal lines. A shift register is coupled to a plurality of pixel driver circuits in at least one row of sub-pixels and at least a part of the plurality of control signal lines, and includes a plurality of first thin film transistors that are divided into a plurality of first thin film transistors. At least one thin film transistor group is located in the display region and distributed between adjacent sub-pixels in a same row of sub-pixels.
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