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51.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 4/15 AND 256-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME 有权用于低密度奇偶校验的位交换器检查长度为64800的长度和4/15和256符号映射的代码率，以及使用相同的位交互方法公开(公告)号：US20150256202A1
公开(公告)日：2015-09-10
申请号：US14636053
申请日：2015-03-02
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/1165 , H03M13/17 , H03M13/255 , H03M13/27 , H03M13/2778 , H03M13/2792 , H03M13/618 , H03M13/6522
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为64800和码率为4/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于256符号映射的调制器。
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52.发明申请BIT INTERLEAVER FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING LENGTH OF 64800 AND CODE RATE OF 3/15 AND 16-SYMBOL MAPPING, AND BIT INTERLEAVING METHOD USING SAME 有权用于低密度奇偶校验的位交换机检查长度为64800，编码速率为3/15和16符号映射，以及使用相同的位交互方法公开(公告)号：US20150236722A1
公开(公告)日：2015-08-20
申请号：US14626238
申请日：2015-02-19
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2792 , H03M13/036 , H03M13/1148 , H03M13/116 , H03M13/1165 , H03M13/255 , H03M13/616 , H04L1/0041 , H04L1/0045 , H04L1/0058 , H04L1/0071
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
Abstract translation: 本文公开了一种位交织器，位交织编码调制（BICM）装置和比特交织方法。 比特交织器包括第一存储器，处理器和第二存储器。 第一存储器存储长度为64800且码率为3/15的低密度奇偶校验（LDPC）码字。 处理器通过基于比特组交织LDPC码字来产生交错码字。 位组的大小对应于LDPC码字的并行因子。 第二存储器将交织的码字提供给用于16符号映射的调制器。
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53.发明申请MODULATOR AND MODULATION METHOD USING NON-UNIFORM 16-SYMBOL SIGNAL CONSTELLATION FOR LOW-DENSITY PARITY CHECK CODEWORD HAVING 2/15 CODE RATE 有权使用非均匀16符号信号的调制解调器和调制方法用于低密度奇偶校验检查具有2/15码率的编码公开(公告)号：US20150229328A1
公开(公告)日：2015-08-13
申请号：US14618923
申请日：2015-02-10
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H04L1/0041 , H03M13/1102 , H03M13/1148 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0058
Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 2/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
Abstract translation: 公开了一种使用非均匀16符号信号星座的调制器和调制方法。 调制器包括存储器和处理器。 存储器接收与码率为2/15的低密度奇偶校验（LDPC）码对应的码字。 处理器将码字映射为4比特的16位符号的不均匀16符号信号星座。
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54.发明公开公开(公告)号：US20240214112A1
公开(公告)日：2024-06-27
申请号：US18540654
申请日：2023-12-14
Inventor： Jae-Hyun SEO , Hoi-Yoon JUNG , Sung-Ik PARK , Bo-Mi LIM , Dong-Joon CHOI , Nam-Ho HUR
CPC classification number: H04L1/0041 , H04L1/0071 , H04L5/0053 , H04L2001/0093
Abstract: Disclosed herein are a method for processing a retransmission broadcast signal using multi-antenna signals based on channel bonding and an apparatus for the same. The apparatus includes a stream multiplexing (muxing) unit for generating a single piece of input data from signals received from two or more reception channels, an input formatting unit for converting the input data into a Physical Layer Pipe (PLP), a stream partitioning unit for segmenting the physical layer pipe into pieces of data to be respectively transmitted over two or more transmission channels, and two or more retransmission-signal-processing units for retransmitting the pieces of data to the respective transmission channels corresponding thereto through multiple transmission antennas.
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公开(公告)号：US20240171197A1
公开(公告)日：2024-05-23
申请号：US18429127
申请日：2024-01-31
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
CPC classification number: H03M13/2757 , H03M13/1102 , H03M13/116 , H03M13/1185 , H03M13/255 , H03M13/2778 , H03M13/2792 , H03M13/616 , H03M13/6552 , H04L1/0041 , H04L1/0057 , H04L1/0058 , H04L1/0071 , H04L27/20 , H04L27/3416
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
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Patent Agency Ranking
公开(公告)号：US20240015208A1
公开(公告)日：2024-01-11
申请号：US18188229
申请日：2023-03-22
Inventor： Hoi-Yoon JUNG , Sung-Ik PARK , Nam-Ho HUR , David Gomez-Barquero , Carlos Barjau Estevan
IPC: H04L67/1021 , H04L69/164 , H04L69/08
CPC classification number: H04L67/1021 , H04L69/164 , H04L69/08
Abstract: Disclosed herein are a content provision method and apparatus using a convergence network. The content provision method may include creating a Quick UDP Internet Connections V1 (QUICV1) path with User Equipment (UE) through a Fifth-Generation (5G) core, when content satisfies a preset condition while the content is being provided to the UE through the QUICV1 path, determining to offload the content through the 5G core, creating an Internet Protocol Security (IPSEC) tunnel with an Advanced Television Systems Committee (ATSC) gateway (GW) through the 5G core, generating a QUIC multicast stream, providing QUIC multicast session information to multiple UE devices, and providing the content to multiple UE devices, for which a mode switches from a QUICV1 mode to a QUIC multicast mode, through the ATSC GW.
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公开(公告)号：US20230283323A1
公开(公告)日：2023-09-07
申请号：US18177623
申请日：2023-03-02
Inventor： Bo-Mi LIM , Sung-Ik PARK , Sung-Jun AHN , Hoi-Yoon JUNG , Hae-Chan KWON , Nam-Ho HUR
IPC: H04B7/0413 , H04B7/08
CPC classification number: H04B7/0413 , H04B7/0811
Abstract: Disclosed herein are a broadcast signal transmission method for signaling a transmission structure based on a combination of LDM technology and MIMO technology and an apparatus using the same. The broadcast signal transmission method may include generating first signaling information, indicating a transmission structure based on a combination of Multiple-Input Multiple-Output (MIMO) technology and Layered Division Multiplexing (LDM) technology, for a first subframe of a current broadcast signal frame, generating second signaling information, indicating a transmission structure based on a combination of the MIMO technology and the LDM technology, for a current subframe subsequent to the first subframe, and generating a broadcast signal using the first signaling information and the second signaling information.
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58.发明公开公开(公告)号：US20230246897A1
公开(公告)日：2023-08-03
申请号：US18298498
申请日：2023-04-11
Inventor： Sung-Ik PARK , Jae-Young LEE , Sun-Hyoung KWON , Heung-Mook KIM
IPC: H04L27/26 , H04J11/00 , H04L1/00 , H04L7/08 , H04L65/611
CPC classification number: H04L27/2627 , H04J11/004 , H04L1/0041 , H04L1/0058 , H04L1/0068 , H04L1/0071 , H04L1/0072 , H04L7/08 , H04L27/26 , H04L27/2613 , H04L27/2647 , H04L65/611
Abstract: An apparatus and method for broadcast signal frame using a bootstrap and a preamble are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.
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公开(公告)号：US20220394117A1
公开(公告)日：2022-12-08
申请号：US17886167
申请日：2022-08-11
Inventor： Bo-Mi LIM , Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
IPC: H04L69/324
Abstract: An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing time-interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling start position information and size information for each of Physical Layer Pipes (PLPs). In this case, the Physical Layer Pipes include a core layer physical layer pipe corresponding to the core layer signal and an enhanced layer physical layer pipe corresponding to the enhanced layer signal.
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公开(公告)号：US20220329264A1
公开(公告)日：2022-10-13
申请号：US17845614
申请日：2022-06-21
Inventor： Sung-Ik PARK , Sun-Hyoung KWON , Jae-Young LEE , Heung-Mook KIM , Nam-Ho HUR
Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
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