公开(公告)号：US20150041905A1

公开(公告)日：2015-02-12

申请号：US13959847

申请日：2013-08-06

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Ruilong Xie ,  Kisik Choi ,  Su Chen Fan ,  Shom Ponoth

IPC: H01L29/66 ,  H01L27/092 ,  H01L21/28

CPC classification number: H01L27/0922 ,  H01L21/28114 ,  H01L21/823842 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/401 ,  H01L29/42376 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/4983 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/78

Abstract: Disclosed herein are illustrative methods and devices that involve forming spacers with internally trimmed internal surfaces to increase the width of the upper portions of a gate cavity. In some embodiments, the internal surface of the spacer has a stepped cross-sectional configuration or a tapered cross-sectional configuration. In one example, a device is disclosed wherein the P-type work function metal for a PMOS device is positioned only within the lateral space defined by the untrimmed internal surfaces of the spacers, while the work function adjusting metal for the NMOS device is positioned laterally between the lateral spaces defined by both the trimmed and untrimmed internal surfaces of the sidewall spacers.

Abstract translation: 这里公开的是说明性方法和装置，其涉及形成具有内部修整的内表面的间隔物，以增加栅腔的上部的宽度。 在一些实施例中，间隔件的内表面具有阶梯形横截面构造或锥形横截面构造。 在一个示例中，公开了一种器件，其中用于PMOS器件的P型功函数金属仅位于由间隔物的未修整内表面限定的横向空间内，而用于NMOS器件的功函数调整金属位于横向 在由侧壁间隔件的修剪和未修整内表面限定的横向空间之间。

公开(公告)号：US20140124876A1

公开(公告)日：2014-05-08

申请号：US13670251

申请日：2012-11-06

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Hoon Kim ,  Kisik Choi

IPC: H01L29/423 ,  H01L29/78 ,  H01L21/28

CPC classification number: H01L21/28088 ,  H01L29/4966

Abstract: A PFET-based semiconductor gate structure providing a midgap work function for threshold voltage control between that of a NFET and a PFET is created by including an annealed layer of relatively thick TiN to dominate and shift the overall work function down from that of PFET. The structure has a PFET base covered with a high-k dielectric, a layer of annealed TiN, a layer of unannealed TiN, a thin barrier over the unannealed TiN, and n-type metal over the thin barrier.

Abstract translation: 通过包括相对较厚的TiN的退火层来支配并将整个功函数从PFET的整个功能转移到底部，从而产生用于在NFET和PFET之间进行阈值电压控制的中隙工作功能的基于PFET的半导体栅极结构。 该结构具有覆盖有高k电介质层，退火TiN层，未退火TiN层，未退火TiN上的薄势垒和薄势垒上的n型金属的PFET基极。