公开(公告)号：US20080231314A1

公开(公告)日：2008-09-25

申请号：US11754301

申请日：2007-05-27

申请人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

发明人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

IPC分类号： H03K19/173

CPC分类号： H03K19/17704 ,  H03K19/17736

摘要： Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.

公开(公告)号：US07317331B2

公开(公告)日：2008-01-08

申请号：US11081877

申请日：2005-03-15

申请人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

发明人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

IPC分类号： H03K19/177

CPC分类号： H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable IC that includes several sections. Each section includes several configurable circuits, each of which configurably performs a set of operations. Each section stores multiple configuration data sets for each configurable circuit. Each configuration data set for a particular configurable circuit specifies the operation that the particular configurable circuit has to perform from the circuit's set of operations, where the configurable circuits of at least two different sections change configuration data sets at two different reconfiguration rates.

摘要翻译： 一些实施例提供了包括几个部分的可重新配置的IC。 每个部分包括几个可配置的电路，每个可配置电路可配置地执行一组操作。 每个部分存储每个可配置电路的多个配置数据集。 针对特定可配置电路的每个配置数据集指定特定可配置电路必须从电路的操作集合执行的操作，其中至少两个不同部分的可配置电路以两种不同的重新配置速率改变配置数据集。

公开(公告)号：US07236009B1

公开(公告)日：2007-06-26

申请号：US11082200

申请日：2005-03-15

申请人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

发明人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

IPC分类号： H03K19/173 ,  H03K19/177 ,  G06F7/38 ,  H01L25/00

CPC分类号： G06F17/5054 ,  G06F17/5077 ,  H03K19/173 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The reconfigurable circuits include several time-extending reconfigurable circuits. During the operation of the IC, each particular time-extending reconfigurable circuit maintains at least one of its configurations over at least two contiguous cycles, in order to allow a signal to propagate through a signal path, which contains the particular time-extending circuit, within a desired amount of time.

摘要翻译： 一些实施例提供可重构集成电路（“IC”）。 该IC具有几个可重新配置电路，每个具有几个配置周期的配置。 可重新配置的电路包括几个延时可重构电路。 在IC的操作期间，每个特定的时间延长的可重新配置电路在至少两个连续周期内保持其配置中的至少一个，以便允许信号传播通过包含特定延时电路的信号路径， 在期望的时间内。

公开(公告)号：US07797497B1

公开(公告)日：2010-09-14

申请号：US11371214

申请日：2006-03-08

申请人： Herman Schmit ,  Steven Teig ,  Brad Hutchings

发明人： Herman Schmit ,  Steven Teig ,  Brad Hutchings

IPC分类号： G06F13/00

CPC分类号： G06F17/5054

摘要： Some embodiments provide for a method of mapping a user design to a configurable integrated circuit (IC). The method is for a configurable IC that implements a user design with an associated user design clock cycle. The IC operates on a sub-cycle clock that has multiple sub-cycle periods within a user period of the user design clock cycle. The method identifies multiple port accesses to a first multi-port memory defined in the user design. The accesses are in a single user design clock cycle. The method maps the multiple port accesses to the first multi-port memory to multiple physical-port memory accesses to a second physical-port memory in the configurable IC during multiple sub-cycles associated with a single user design clock cycle.

摘要翻译： 一些实施例提供了将用户设计映射到可配置集成电路（IC）的方法。 该方法用于可配置IC，其实现具有相关联的用户设计时钟周期的用户设计。 该IC在具有用户设计时钟周期的用户周期内的多个子周期周期的子周期时钟上工作。 该方法识别对用户设计中定义的第一个多端口存储器的多个端口访问。 访问处于单个用户设计时钟周期。 该方法将与第一多端口存储器的多端口访问映射到在与单个用户设计时钟周期相关联的多个子周期期间对可配置IC中的第二物理端口存储器的多个物理端口存储器访问。

公开(公告)号：US20090160481A9

公开(公告)日：2009-06-25

申请号：US11617671

申请日：2006-12-28

申请人： Herman Schmit ,  Michael Butts ,  Brad Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/1737 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/17756

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The configurable IC includes first and second interconnect circuits. The first interconnect circuit has a set of input terminals, a set of output terminals, and several connection schemes for communicatively coupling the input terminal set to the output terminal set. During the operation of the IC, the second connection circuit supplies sets of configuration data to the first interconnect circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the first interconnect circuit to use two different connection schemes that differently couple the input and output terminal sets.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 可配置IC包括第一和第二互连电路。 第一互连电路具有一组输入端子，一组输出端子以及用于将输入端子组通信耦合到输出端子组的若干连接方案。 在IC的操作期间，第二连接电路至少在特定时间段以特定速率向第一互连电路提供配置数据组。 至少两个提供的配置数据组是不同的，并且将第一互连电路配置为使用不同地连接输入和输出端子组的两种不同的连接方案。

公开(公告)号：US20070241784A1

公开(公告)日：2007-10-18

申请号：US11082199

申请日：2005-03-15

申请人： Brad Hutchings ,  Herman Schmit ,  Steven Teig

发明人： Brad Hutchings ,  Herman Schmit ,  Steven Teig

IPC分类号： H03K19/177

CPC分类号： H03K19/17736

摘要： Some embodiments of the invention provide a configurable integrated circuit (“IC”). The IC includes a first set of circuits and a second set of circuits interspersed among the first set of circuits. Each set of circuits includes at least ten volatile configurable circuits. Several circuits in at least one of the sets are user multiplexers. Each particular user multiplexer has input and output terminals and has a set of select terminals for receiving a set of user-design signals that directs the particular multiplexer to connect a set of the input terminals to a set of the output terminals. The user-design signals are signals generated internally by the IC.

摘要翻译： 本发明的一些实施例提供了可配置的集成电路（“IC”）。 IC包括散布在第一组电路中的第一组电路和第二组电路。 每组电路包括至少十个易失性可配置电路。 至少一个组中的几个电路是用户多路复用器。 每个特定的用户多路复用器具有输入和输出端子，并且具有一组选择端子，用于接收一组用户设计信号，所述一组用户设计信号指示特定多路复用器将一组输入端子连接到一组输出端子。 用户设计信号是由IC内部产生的信号。

公开(公告)号：US20070241777A1

公开(公告)日：2007-10-18

申请号：US11617671

申请日：2006-12-28

申请人： Herman Schmit ,  Michael Butts ,  Brad Hutchings ,  Steven Teig

发明人： Herman Schmit ,  Michael Butts ,  Brad Hutchings ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/1737 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/17756

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC). The configurable IC includes first and second interconnect circuits. The first interconnect circuit has a set of input terminals, a set of output terminals, and several connection schemes for communicatively coupling the input terminal set to the output terminal set. During the operation of the IC, the second connection circuit supplies sets of configuration data to the first interconnect circuit at a particular rate for at least a particular time period. At least two supplied configuration data sets are different and configure the first interconnect circuit to use two different connection schemes that differently couple the input and output terminal sets.

摘要翻译： 本发明的一些实施例提供了一种可配置的集成电路（IC）。 可配置IC包括第一和第二互连电路。 第一互连电路具有一组输入端子，一组输出端子以及用于将输入端子组通信耦合到输出端子组的若干连接方案。 在IC的操作期间，第二连接电路至少在特定时间段以特定速率向第一互连电路提供配置数据组。 至少两个提供的配置数据组是不同的，并且将第一互连电路配置为使用不同地连接输入和输出端子组的两种不同的连接方案。

公开(公告)号：US07224182B1

公开(公告)日：2007-05-29

申请号：US11082221

申请日：2005-03-15

申请人： Brad Hutchings ,  Herman Schmit ,  Steven Teig

发明人： Brad Hutchings ,  Herman Schmit ,  Steven Teig

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/17704 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17748

摘要： Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable logic circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit has: (1) a set of inputs, (2) a set of outputs for selectively connecting to the set of inputs, and (3) a set of select lines for receiving select signals that direct the hybrid circuit to connect the input set to the output set in a particular manner. At least one select signal is for controllably receiving configuration data and at least one select line is for controllably receiving signals generated by the configurable logic circuits.

摘要翻译： 本发明的一些实施例提供了可配置的集成电路（“IC”）。 该IC包括用于接收配置数据并且可配置地基于配置数据执行一组操作的多个可配置逻辑电路。 它还包括几个混合电路。 每个特定的混合电路具有：（1）一组输入，（2）用于选择性地连接到该组输入的一组输出，以及（3）一组选择线，用于接收引导混合电路连接的选择信号 将输入以特定方式设置为输出集。 至少一个选择信号用于可控地接收配置数据，并且至少一个选择线用于可控地接收由可配置逻辑电路产生的信号。

公开(公告)号：US20110206176A1

公开(公告)日：2011-08-25

申请号：US13021702

申请日：2011-02-04

申请人： Brad Hutchings ,  Jason Redgrave ,  Dai Huang ,  Steven Teig

发明人： Brad Hutchings ,  Jason Redgrave ,  Dai Huang ,  Steven Teig

IPC分类号： G06M3/00

CPC分类号： G06F1/04 ,  G06M3/00 ,  H03K19/017581 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17748 ,  H03K19/1776 ,  H03K19/17764

摘要： Some embodiments provide an integrated circuit (“IC”). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred.

摘要翻译： 一些实施例提供集成电路（“IC”）。 IC包括可配置地基于配置数据执行用户设计操作的多个可配置电路。 IC还包括可配置触发电路，其接收指定操作事件的一组配置数据。 可配置触发电路还确定在实施IC的用户设计期间是否发生了操作事件。 此外，当确定操作触发事件已经发生时，操作触发事件输出触发信号。

公开(公告)号：US08525548B2

公开(公告)日：2013-09-03

申请号：US13057477

申请日：2008-12-29

申请人： Brad Hutchings ,  Jason Redgrave ,  Dai Huang ,  Steven Teig

发明人： Brad Hutchings ,  Jason Redgrave ,  Dai Huang ,  Steven Teig

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： G06F1/04 ,  G06M3/00 ,  H03K19/017581 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17748 ,  H03K19/1776 ,  H03K19/17764

摘要： Some embodiments provide an integrated circuit (‘IC’). The IC includes multiple configurable circuits that configurably perform operations of a user design based on configuration data. The IC also includes a configurable trigger circuit that receives a set of configuration data that specifies an operational event. The configurable trigger circuit also determines whether the operational event has occurred during implementation of the user design of the IC. Additionally, the operational trigger event outputs a trigger signal upon determining that the operational trigger event has occurred.

摘要翻译： 一些实施例提供集成电路（'IC'）。 IC包括可配置地基于配置数据执行用户设计操作的多个可配置电路。 IC还包括可配置触发电路，其接收指定操作事件的一组配置数据。 可配置触发电路还确定在实施IC的用户设计期间是否发生了操作事件。 此外，当确定操作触发事件已经发生时，操作触发事件输出触发信号。