公开(公告)号：US07962705B2

公开(公告)日：2011-06-14

申请号：US12729227

申请日：2010-03-22

申请人： Herman Schmit ,  Andrew Caldwell ,  Brad Hutchings ,  Jason Redgrave ,  Steven Teig

发明人： Herman Schmit ,  Andrew Caldwell ,  Brad Hutchings ,  Jason Redgrave ,  Steven Teig

IPC分类号： G06F9/315

CPC分类号： H03K19/17736 ,  H03K19/1776

摘要： Some embodiments provide a method of presenting virtual memory as narrower and deeper than a physical memory. The method receives a memory address location including a set of real memory address bits and a set of virtual memory position bits. The method retrieves an original memory word from a physical memory using the real memory address bits. The method shifts the original memory word by an amount determined by the virtual memory position bits by using a barrel shifter, creating a shifted memory word. The method reads a part of the shifted memory word.

摘要翻译： 一些实施例提供了一种呈现比物理存储器更窄和更深的虚拟存储器的方法。 该方法接收包括一组实际存储器地址位和一组虚拟存储器位置位的存储器地址位置。 该方法使用实际存储器地址位从物理存储器中检索原始存储器字。 该方法通过使用桶形移位器将原始存储器字移动由虚拟存储器位置位确定的量，创建移位的存储器字。 该方法读取移位的存储器字的一部分。

公开(公告)号：US07595655B2

公开(公告)日：2009-09-29

申请号：US11769686

申请日：2007-06-27

申请人： Brad Hutchings ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave

发明人： Brad Hutchings ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave

IPC分类号： H03K19/00 ,  G06F17/50

CPC分类号： H03K19/17764 ,  H03K19/17736

摘要： Some embodiments provide a configurable integrated circuit (IC). The IC has configurable logic circuits for performing logical operations, configurable routing circuits for routing signals between the configurable logic circuits, and a network for monitoring data. In some embodiments a method uses at least a subset of the configurable logic circuits and a first subset of the configurable routing circuits to implement a user design circuit on the configurable IC. The method uses a second subset of the configurable routing circuits to pass signals to the network.

摘要翻译： 一些实施例提供可配置集成电路（IC）。 IC具有用于执行逻辑操作的可配置逻辑电路，用于在可配置逻辑电路之间路由信号的可配置路由电路以及用于监视数据的网络。 在一些实施例中，一种方法使用可配置逻辑电路的至少一个子集和可配置路由电路的第一子集来实现可配置IC上的用户设计电路。 该方法使用可配置路由电路的第二子集将信号传递到网络。

公开(公告)号：US07587698B1

公开(公告)日：2009-09-08

申请号：US11751629

申请日：2007-05-21

申请人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

发明人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

IPC分类号： G06F17/50 ,  H03K19/00 ,  H03K19/177

CPC分类号： G06F17/5054 ,  G06F17/5077 ,  H03K19/173 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The reconfigurable circuits include several time-extending reconfigurable circuits. During the operation of the IC, each particular time-extending reconfigurable circuit maintains at least one of its configurations over at least two contiguous cycles, in order to allow a signal to propagate through a signal path, which contains the particular time-extending circuit, within a desired amount of time.

摘要翻译： 一些实施例提供可重构集成电路（“IC”）。 该IC具有几个可重新配置电路，每个具有几个配置周期的配置。 可重新配置的电路包括几个延时可重构电路。 在IC的操作期间，每个特定的时间延长的可重新配置电路在至少两个连续周期内保持其配置中的至少一个，以便允许信号传播通过包含特定延时电路的信号路径， 在期望的时间内。

公开(公告)号：US20080231314A1

公开(公告)日：2008-09-25

申请号：US11754301

申请日：2007-05-27

申请人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

发明人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

IPC分类号： H03K19/173

CPC分类号： H03K19/17704 ,  H03K19/17736

摘要： Some embodiments provide a configurable IC that includes a configurable routing fabric with storage elements. In some embodiments, the routing fabric provides a communication pathway that routes signals to and from source and destination components. The routing fabric of some embodiments provides the ability to selectively store the signals passing through the routing fabric within the storage elements of the routing fabric. In this manner, a source or destination component continually performs operations (e.g., computational or routing) irrespective of whether a previous signal from or to such a component is stored within the routing fabric. The source and destination components include configurable logic circuits, configurable interconnect circuits, and various other circuits that receive or distribute signals throughout the configurable IC.

公开(公告)号：US07317331B2

公开(公告)日：2008-01-08

申请号：US11081877

申请日：2005-03-15

申请人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

发明人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

IPC分类号： H03K19/177

CPC分类号： H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable IC that includes several sections. Each section includes several configurable circuits, each of which configurably performs a set of operations. Each section stores multiple configuration data sets for each configurable circuit. Each configuration data set for a particular configurable circuit specifies the operation that the particular configurable circuit has to perform from the circuit's set of operations, where the configurable circuits of at least two different sections change configuration data sets at two different reconfiguration rates.

摘要翻译： 一些实施例提供了包括几个部分的可重新配置的IC。 每个部分包括几个可配置的电路，每个可配置电路可配置地执行一组操作。 每个部分存储每个可配置电路的多个配置数据集。 针对特定可配置电路的每个配置数据集指定特定可配置电路必须从电路的操作集合执行的操作，其中至少两个不同部分的可配置电路以两种不同的重新配置速率改变配置数据集。

公开(公告)号：US07307449B1

公开(公告)日：2007-12-11

申请号：US11269168

申请日：2005-11-07

申请人： Jason Redgrave ,  Brad Hutchings ,  Herman Schmit ,  Steven Teig

发明人： Jason Redgrave ,  Brad Hutchings ,  Herman Schmit ,  Steven Teig

IPC分类号： H03K19/173

CPC分类号： H03K19/1737 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17748 ,  H03K19/17796

摘要： Some embodiments of the invention provide a configurable integrated circuit (“IC”). This IC includes several configurable circuits for receiving configuration data and configurably performing a set of operations based on the configuration data. It also includes several hybrid circuits. Each particular hybrid circuit can interchangeably perform as either a logic circuit or an interconnect circuit in the configurable IC.

摘要翻译： 本发明的一些实施例提供了可配置的集成电路（“IC”）。 该IC包括用于接收配置数据并且可配置地基于配置数据执行一组操作的多个可配置电路。 它还包括几个混合电路。 每个特定的混合电路可以互换地作为可配置IC中的逻辑电路或互连电路执行。

公开(公告)号：US07236009B1

公开(公告)日：2007-06-26

申请号：US11082200

申请日：2005-03-15

申请人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

发明人： Andre Rohe ,  Steven Teig ,  Herman Schmit ,  Jason Redgrave ,  Andrew Caldwell

IPC分类号： H03K19/173 ,  H03K19/177 ,  G06F7/38 ,  H01L25/00

CPC分类号： G06F17/5054 ,  G06F17/5077 ,  H03K19/173 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable integrated circuit (“IC”). This IC has several reconfigurable circuits, each having several configurations for several configuration cycles. The reconfigurable circuits include several time-extending reconfigurable circuits. During the operation of the IC, each particular time-extending reconfigurable circuit maintains at least one of its configurations over at least two contiguous cycles, in order to allow a signal to propagate through a signal path, which contains the particular time-extending circuit, within a desired amount of time.

摘要翻译： 一些实施例提供可重构集成电路（“IC”）。 该IC具有几个可重新配置电路，每个具有几个配置周期的配置。 可重新配置的电路包括几个延时可重构电路。 在IC的操作期间，每个特定的时间延长的可重新配置电路在至少两个连续周期内保持其配置中的至少一个，以便允许信号传播通过包含特定延时电路的信号路径， 在期望的时间内。

公开(公告)号：US08760194B2

公开(公告)日：2014-06-24

申请号：US13281425

申请日：2011-10-25

申请人： Brad Hutchings ,  Jason Redgrave ,  Teju Khubehandani ,  Herman Schmit ,  Steven Teig

发明人： Brad Hutchings ,  Jason Redgrave ,  Teju Khubehandani ,  Herman Schmit ,  Steven Teig

IPC分类号： G06F7/38 ,  H03K19/177

CPC分类号： H03K19/1731 ,  H03K19/177 ,  H03K19/17704 ,  H03K19/17736 ,  H03K19/17748 ,  H03K19/17756 ,  H03K19/17764

摘要： Some embodiments of the invention provide a configurable integrated circuit (IC) that has several configurable circuits for configurably performing different operations. During the operation of the IC, each particular configurable circuit performs a particular operation that is specified by a particular configuration data set for the particular configurable circuit. While the IC operates and a first set of configurable circuits performs a first set of operations, configuration data is loaded from the outside of the IC for configuring a second set of configurable circuits. In some embodiments, the configurable IC includes a configuration network for rapid loading configuration data in the IC from outside of the IC. In some of these embodiments, the configuration network is a pipelined network.

摘要翻译： 本发明的一些实施例提供了一种可配置集成电路（IC），其具有用于可配置地执行不同操作的多个可配置电路。 在IC的操作期间，每个特定可配置电路执行由针对特定可配置电路的特定配置数据集指定的特定操作。 当IC操作并且第一组可配置电路执行第一组操作时，从IC的外部加载配置数据，用于配置第二组可配置电路。 在一些实施例中，可配置IC包括用于从IC外部快速加载IC中的配置数据的配置网络。 在这些实施例中的一些实施例中，配置网络是流水线网络。

公开(公告)号：US08433891B2

公开(公告)日：2013-04-30

申请号：US12870779

申请日：2010-08-27

申请人： Jason Redgrave ,  Brad Hutchings ,  Steven Teig ,  Herman Schmit ,  Teju Khubchandani

发明人： Jason Redgrave ,  Brad Hutchings ,  Steven Teig ,  Herman Schmit ,  Teju Khubchandani

IPC分类号： H03K19/00

CPC分类号： H03K19/1731 ,  H03K19/177 ,  H03K19/17704 ,  H03K19/17736 ,  H03K19/17748 ,  H03K19/17756 ,  H03K19/17764

摘要： Some embodiments of the invention provide a configuration/debug network for configuring and debugging a configurable integrated circuit (IC). The configurable IC in some embodiments includes configurable resources (e.g., configurable logic resources, routing resources, memory resources, etc.) that can be grouped in conceptual configurable tiles that are arranged in several rows and columns. Some embodiments allow tiles to be individually addressed, globally addressed (i.e., all addressed together), or addressed based on their tile types. The configurable IC includes numerous user-design state elements (“UDS elements”) in some embodiments. In some embodiments, the configuration/debug network has a streaming mode that can direct various circuits in one or more configurable tiles to stream out their data during the operation of the configurable IC. Accordingly, in the embodiments where the configuration/debug network connects to some or all of the UDS elements, the configurable/debug network can be used in a streaming mode to stream out data from the UDS elements of the tiles, in order to identify any errors in the operation of the IC. In other words, the streaming of the data from the UDS elements can be used to debug the operation of the configurable IC. In some embodiments, the configuration/debug network has a broadcasting mode that can direct various resources (e.g., memories, storage elements, etc.) in one or more configurable tiles to store the same data. For instance, the broadcasting mode can be used to initialize the memory blocks in the configurable memory tiles.

摘要翻译： 本发明的一些实施例提供了用于配置和调试可配置集成电路（IC）的配置/调试网络。 在一些实施例中，可配置IC包括可被分组在以多行和列排列的概念可配置瓦片中的可配置资源（例如，可配置逻辑资源，路由资源，存储器资源等）。 一些实施例允许瓦片被单独寻址，全局寻址（即，全部寻址在一起）或基于它们的瓦片类型寻址。 在一些实施例中，可配置IC包括许多用户设计状态元件（“UDS元件”）。 在一些实施例中，配置/调试网络具有流模式，其可以在一个或多个可配置瓦片中引导各种电路以在可配置IC的操作期间流出其数据。 因此，在配置/调试网络连接到一些或所有UDS元件的实施例中，可配置/调试网络可以以流模式用于从瓦片的UDS元件流出数据，以便识别任何 IC的运行错误。 换句话说，来自UDS元件的数据流可用于调试可配置IC的操作。 在一些实施例中，配置/调试网络具有可以将一些或多个可配置瓦片中的各种资源（例如，存储器，存储元件等）引导以存储相同数据的广播模式。 例如，可以使用广播模式来初始化可配置存储器块中的存储器块。

公开(公告)号：US08183882B2

公开(公告)日：2012-05-22

申请号：US12644008

申请日：2009-12-21

申请人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

发明人： Steven Teig ,  Herman Schmit ,  Jason Redgrave

IPC分类号： H03K19/173

CPC分类号： H03K19/17756 ,  H03K19/17776

摘要： Some embodiments provide a reconfigurable IC that includes several sections. Each section includes several configurable circuits, each of which configurably performs a set of operations. Each section stores multiple configuration data sets for each configurable circuit. Each configuration data set for a particular configurable circuit specifies the operation that the particular configurable circuit has to perform from the circuit's set of operations, where the configurable circuits of at least two different sections change configuration data sets at two different reconfiguration rates.

摘要翻译： 一些实施例提供了包括几个部分的可重新配置的IC。 每个部分包括几个可配置的电路，每个可配置电路可配置地执行一组操作。 每个部分存储每个可配置电路的多个配置数据集。 针对特定可配置电路的每个配置数据集指定特定可配置电路必须从电路的操作集合执行的操作，其中至少两个不同部分的可配置电路以两种不同的重新配置速率改变配置数据集。