公开(公告)号：US20130193437A1

公开(公告)日：2013-08-01

申请号：US13750790

申请日：2013-01-25

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Mathieu Lisart ,  Thierry Soude ,  Alexandre Sarafianos ,  Francesco Larosa

IPC: H01L23/00 ,  H01L21/22

CPC classification number: H01L23/57 ,  G06F21/87 ,  H01L21/22 ,  H01L23/576 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An integrated circuit including: a semiconductor substrate of a first conductivity type having at least one well of a second conductivity type laterally delimited, on two opposite walls, by regions of the first conductivity type, defined at its surface; at least one region of the second conductivity type which extends in the semiconductor substrate under the well; and a system for detecting a variation of the substrate resistance between each association of two adjacent regions of the first conductivity type.

Abstract translation: 一种集成电路，包括：第一导电类型的半导体衬底，其具有在其两个相对的壁上由其表面限定的第一导电类型的区域侧向界定的第二导电类型的至少一个阱; 所述第二导电类型的至少一个区域在所述阱下面的所述半导体衬底中延伸; 以及用于检测第一导电类型的两个相邻区域的每个缔合之间的衬底电阻的变化的系统。