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公开(公告)号:US20240235857A9
公开(公告)日:2024-07-11
申请号:US18277561
申请日:2022-01-18
Applicant: nChain Licensing AG
Inventor: Jack Owen DAVIES , Craig Steven WRIGHT
CPC classification number: H04L9/3278 , G06F21/1078 , G06F21/64 , G06F21/87 , G07C5/085 , H04L9/3242 , H04L9/3247 , H04L9/50 , G06F2221/2103 , H04L2209/12
Abstract: According to a first aspect disclosed herein there is provide a device comprising: a PUF module, and one or more outer layer components providing at least part of an unsecured channel for inputting a challenge to the PUF module and receiving back a response. Internal logic of the PUF module comprises a logging mechanism arranged to automatically log a record of the challenge and/or response in a log medium, e.g. a blockchain. According to a second aspect, there is provided a method comprising: sending a first message to be recorded on a blockchain, submitting a query to check that the first message has been recorded on the blockchain without manipulation, on condition thereof, sending a second messaging transaction to be recorded on the blockchain. The first and second aspects may be used together or independently.
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公开(公告)号:US20240184894A1
公开(公告)日:2024-06-06
申请号:US18532780
申请日:2023-12-07
Applicant: Nubix, Inc.
Inventor: Eric Green , Michael Gray , Rachel Taylor
CPC classification number: G06F21/577 , G06F8/61 , G06F9/45558 , G06F21/31 , G06F21/554 , G06F21/87 , G06F2009/45562
Abstract: A method includes: accessing a set of hardware parameters characterizing an embedded device; identifying a set of supported container functions based on the set of hardware parameters; accessing a selection of container functions; identifying a set of selected container functions based on the selection of container functions and the set of supported container functions; generating a hardware abstraction layer (HAL) including a set of libraries supporting the set of selected container functions; generating a container runtime environment (CRE) configured to execute, at the embedded device, a containerized application via the HAL, the containerized application including the set of selected container functions; installing the HAL and the CRE onto the embedded device; installing the containerized application onto the embedded device via the CRE; and at the embedded device, executing the containerized application via the CRE and the HAL.
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公开(公告)号:US11861053B2
公开(公告)日:2024-01-02
申请号:US17123592
申请日:2020-12-16
Applicant: Intel Corporation
Inventor: Shamanna M. Datta , Asher M. Altman , John K. Grooms , Mohamed Arafa
CPC classification number: G06F21/87 , G06F12/1433 , G06F21/575 , G06F21/79 , G11C13/0004 , G11C13/004 , G11C13/0069
Abstract: Techniques for tamper detection of a memory module having non-volatile memory devices resident on a printed circuit board (PCB) by circuitry of a controller also resident on the PCB. Examples include determining resistance values of a character pattern sprayed on a side of a cover facing the non-volatile memory devices using conductive ink following first and second boots of the memory module and asserting a bit of a register to indicate tampering of the memory modules based on a comparison of the resistance values. Tamper policy actions may be initiated based on detection of tampering.
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公开(公告)号:US11651113B2
公开(公告)日:2023-05-16
申请号:US17193091
申请日:2021-03-05
Inventor: Hideki Matsushima , Teruto Hirota , Yukie Shoda , Shunji Harada
IPC: G06F21/87 , G06F21/14 , G06F21/10 , G06F21/52 , H04L9/40 , G06F21/53 , G06F21/57 , G06F12/14 , H04L9/32 , G06F21/74
CPC classification number: G06F21/87 , G06F12/1408 , G06F21/10 , G06F21/14 , G06F21/52 , G06F21/53 , G06F21/57 , G06F21/74 , H04L9/3234 , H04L9/3247 , H04L63/105 , G06F2212/1052 , G06F2221/2153
Abstract: A program execution device capable of protecting a program against unauthorized analysis and alteration is provided. The program execution device includes an execution unit, a first protection unit, and a second protection unit. The execution unit executes a first program and a second program, and is connected with an external device that is capable of controlling the execution. The first protection unit disconnects the execution unit from the external device while the execution unit is executing the first program. The second protection unit protects the first program while the execution unit is executing the second program.
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5.
公开(公告)号:US20190037686A1
公开(公告)日:2019-01-31
申请号:US15658717
申请日:2017-07-25
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: James A. BUSBY , John R. DANGLER , Michael J. FISHER , David C. LONG
CPC classification number: H05K1/0275 , G01N27/045 , G06F21/86 , G06F21/87 , H05K1/0298 , H05K1/09 , H05K1/115 , H05K1/181 , H05K5/0208 , H05K2201/10151 , H05K2201/10204 , H05K2201/10371 , H05K2201/10522
Abstract: Tamper-respondent assemblies and methods of fabrication are provided which include at least one tamper-respondent sensor and a detector. The at least one tamper-respondent sensor includes conductive lines which form, at least in part, at least one tamper-detect network of the tamper-respondent sensor(s). In addition, the tamper-respondent sensor(s) includes at least one interconnect element associated with one or more conductive lines of the conductive lines forming, at least in part, the tamper-detect network(s). The interconnect element(s) includes at least one interconnect characteristic selected to facilitate obscuring a circuit lay of the at least one tamper-detect network. In operation, the detector monitors the tamper-detect network(s) of the tamper-respondent sensor(s) for a tamper event.
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公开(公告)号:US20180323157A1
公开(公告)日:2018-11-08
申请号:US15589369
申请日:2017-05-08
Applicant: International Business Machines Corporation
Inventor: Gerald K. BARTLEY , Darryl J. BECKER , Matthew S. DOYLE , Mark J. JEANSON , Joseph KUCZYNSKI
CPC classification number: H01L23/576 , G06F21/78 , G06F21/87
Abstract: An apparatus comprises a plurality of conductive elements arranged within at least a first conductive layer and a dielectric layer comprising a plurality of microcapsules. The first conductive layer is arranged on a first side of the dielectric layer. The apparatus further comprises monitoring circuitry coupled with the plurality of conductive elements and configured to detect a change in an electrical parameter for at least a first conductive element of the plurality of conductive elements. The change in the electrical parameter indicates a physical intrusion of the dielectric layer that causes a rupture of one or more microcapsules of the plurality of microcapsules.
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7.
公开(公告)号:US20180300596A1
公开(公告)日:2018-10-18
申请号:US15945304
申请日:2018-04-04
Applicant: Capital One Services, LLC
Inventor: David WURMFELD , James ZARAKAS , Theodore MARKSON , Saleem SANGI , Tyler LOCKE , Kevin KELLY
IPC: G06K19/073 , G06K19/077
CPC classification number: G06K19/07381 , G06F21/77 , G06F21/87 , G06K19/07372 , G06K19/07722 , G06K19/07743
Abstract: A dynamic transaction card that is manufactured using conductive plastic jumpers that will dissolve when in contact with a solvent used to tamper with the dynamic transaction card. Internal components of a dynamic transaction card may be manufactured using a synthetic or semi-synthetic organic material, such as, for example, plastics. These materials may be conductive to provide functionality to a dynamic transaction card, such as a connection between an integrated circuit and other card components such that when the materials dissolve, the connections are broken and the dynamic transaction card may be inactive due to the loss of various connections.
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公开(公告)号:US20180232542A1
公开(公告)日:2018-08-16
申请号:US15947379
申请日:2018-04-06
Applicant: INSIDE SECURE
Inventor: Michel Martin
CPC classification number: G06F21/86 , G06F21/87 , H01L23/576
Abstract: In a general aspect, an integrated circuit can include a network configured to detect fault-injection attacks on the integrated circuit, the network including a plurality of optical sensors. The integrated circuit can also include a surveillance flip-flop coupled with the network, the surveillance flip-flop being configured to signal a fault when one or more optical sensors of the plurality of optical sensors changes state. The integrated circuit can further include at least one inductive winding included in the network, the at least one inductive winding being configured to generate an induced voltage that causes switching of at least one optical sensor of the plurality of optical sensors when the at least one inductive winding is subjected to an electromagnetic flux capable of causing a fault-injection in the integrated circuit.
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公开(公告)号:US20180173903A1
公开(公告)日:2018-06-21
申请号:US15900317
申请日:2018-02-20
Applicant: VeriFone, Inc.
IPC: G06F21/87 , G06F21/86 , G06F1/16 , G06F3/0489
CPC classification number: G06F21/87 , G06F1/1626 , G06F1/1662 , G06F3/0489 , G06F21/86
Abstract: A data entry device including a housing, data entry circuitry located within the housing, a keypad mounted in the housing and having a plurality of movable key elements which, when depressed, are displaced to at least a predetermined extent from a first location within the housing to a second location within the housing and Optical Finger Navigation (OFN) circuitry mounted inside the housing, being operative for sensing at least some of the plurality of movable key elements when depressed and displaced to at least the predetermined extent from the first location within the housing to the second location within the housing and providing a key displacement output indicating key displacement to the data entry circuitry.
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公开(公告)号:US09997475B2
公开(公告)日:2018-06-12
申请号:US14994267
申请日:2016-01-13
Applicant: International Business Machines Corporation
Inventor: Kenneth Rodbell , Davood Shahrjerdi
CPC classification number: H01L23/573 , G06F21/87 , G06F2221/2143 , H01L27/142 , H01L27/1443 , H01L31/0693 , H01L31/1852 , H01L31/1892 , Y02E10/544
Abstract: A method for making a photovoltaic device is provided that includes the steps of providing a silicon substrate having a complementary metal-oxide semiconductor (“CMOS”); bonding a first layer of silicon oxide to a second layer of silicon oxide wherein the bonded layers are deposited on the silicon substrate; and forming a III-V photovoltaic cell on a side of the bonded silicon oxide layers opposite the silicon substrate, wherein when the III-V photovoltaic cell is exposed to radiation, the III-V photovoltaic cell generates a current that powers a memory erasure device to cause an alteration of a memory state of a memory cell in an integrated circuit.
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